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CS4391A Arkusz danych(PDF) 2 Page - Cirrus Logic

Numer części CS4391A
Szczegółowy opis  24-BIT, 192 kHz STEREO DAC WITH VOLUME CONTROL
Download  40 Pages
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Producent  CIRRUS [Cirrus Logic]
Strona internetowa  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4391A Arkusz danych(HTML) 2 Page - Cirrus Logic

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CS4391A
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DS600PP3
TABLE OF CONTENTS
1. CHARACTERISTICS/SPECIFICATIONS ................................................................................. 5
2. TYPICAL CONNECTION DIAGRAMS ................................................................................... 13
3. REGISTER QUICK REFERENCE .......................................................................................... 15
3.1 Mode Control 1 (address 01h) .......................................................................................... 15
3.2 Volume and Mixing Control (address 02h)........................................................................ 16
3.3 Channel A Volume Control (address 03h) ........................................................................ 16
3.4 Channel B Volume Control (address 04h) ........................................................................ 16
3.5 Mode Control 2 (address 05h) .......................................................................................... 17
4. REGISTER DESCRIPTION .................................................................................................... 18
4.1 Mode Control 1 - Address 01h .......................................................................................... 18
4.1.1 Auto-Mute (Bit 7) ................................................................................................. 18
4.1.2 Digital Interface Formats (Bits 6:4) ...................................................................... 18
4.1.3 De-Emphasis Control (Bits 3:2) ........................................................................... 18
4.1.4 Functional Mode (Bits 1:0) .................................................................................. 18
4.2 Volume and Mixing Control (Address 02h) ....................................................................... 19
4.2.1 Channel A Volume = Channel B Volume (Bit 7) ................................................. 19
4.2.2 Soft Ramp or Zero Cross Enable (Bits 6:5) ......................................................... 19
4.2.3 ATAPI Channel Mixing and Muting (Bits 4:0) ...................................................... 19
4.3 Channel A Volume Control - Address 03h ........................................................................ 19
4.4 Channel B Volume Control - Address 04h ....................................................................... 20
4.4.1 Mute (Bit 7) .......................................................................................................... 20
4.4.2 Volume Control (Bits 6:0) .................................................................................... 20
4.5 Mode Control 2 - Address 05h .......................................................................................... 20
4.5.1 Invert Signal Polarity (Bits 7:6) ............................................................................ 20
4.5.2 Control Port Enable (Bit 5) .................................................................................. 20
4.5.3 Power Down (Bit 4) ............................................................................................. 20
4.5.4 AMUTEC = BMUTEC (Bit 3) ............................................................................... 20
4.5.5 Freeze (Bit 2) ...................................................................................................... 21
4.5.6 Master Clock Divide (Bit 1) .................................................................................. 21
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to http://www.cirrus.com
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product infor-
mation describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the infor-
mation contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty
of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this
information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus
and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or
other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the
information only for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying
such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this ma-
terial and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be
obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign
Trade Law and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANT-
ED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Purchase of I2C components of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys a license under the Phillips I2C Patent Rights to use
those components in a standard I2C system.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trade-
marks or service marks of their respective owners.


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