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ADG3233BRM Arkusz danych(PDF) 9 Page - Analog Devices

Numer części ADG3233BRM
Szczegółowy opis  Low Voltage 1.65 V to 3.6 V, Bidirectional Logic Level Translation, Bypass Switch
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Strona internetowa  http://www.analog.com
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ADG3233BRM Arkusz danych(HTML) 9 Page - Analog Devices

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REV. 0
ADG3233
–9–
DESCRIPTION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.
A1 and
EN Input
The A1 and enable (
EN) inputs have V
IL/VIH logic levels so that
the part can accept logic levels of VOL/VOH from Device 0 or the
controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1,
EN) are capable
of accepting inputs outside the VCC1 supply range. For example,
the VCC1 supply applied to the bypass switch could be 1.8 V
while Device 0 could be operating from a 2.5 V or 3.3 V supply
rail, there are no internal diodes to the supply rails, so the device
can handle inputs above the supply but inside the absolute
maximum ratings.
Normal Operation
Figure 4 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 to Y1 and A2 to Y2.
The device will level translate the signal applied to A1 to a VCC1
logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which will
have standard VOL/VOH levels for VCC1 supplies. The signal is
then passed through Device 1 and back to the A2 input pin of
the bypass switch.
The logic level inputs of A2 are with respect to the VCC1 supply.
The signal will be level translated from VCC1 to VCC2 and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the VCC2 supply.
SIGNAL INPUT
VCC0
DEVICE 0
A1
A2
Y1
Y2
EN
BYPASS SWITCH
SIGNAL OUTPUT
VCC1
DEVICE 1
VCC2
DEVICE 2
VCC1
VCC2
LOGIC 1
Figure 4. Bypass Switch in Normal Mode


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