Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

CS61880 Arkusz danych(PDF) 5 Page - Cirrus Logic

Numer części CS61880
Szczegółowy opis  OCTAL E1 LINE INTERFACE UNIT
Download  70 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  CIRRUS [Cirrus Logic]
Strona internetowa  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61880 Arkusz danych(HTML) 5 Page - Cirrus Logic

  CS61880 Datasheet HTML 1Page - Cirrus Logic CS61880 Datasheet HTML 2Page - Cirrus Logic CS61880 Datasheet HTML 3Page - Cirrus Logic CS61880 Datasheet HTML 4Page - Cirrus Logic CS61880 Datasheet HTML 5Page - Cirrus Logic CS61880 Datasheet HTML 6Page - Cirrus Logic CS61880 Datasheet HTML 7Page - Cirrus Logic CS61880 Datasheet HTML 8Page - Cirrus Logic CS61880 Datasheet HTML 9Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 70 page
background image
CS61880
DS450PP3
5
LIST OF FIGURES
Figure 1. CS61880 144-Pin LQFP Package Pin Outs .................................................................... 7
Figure 2. CS61880 160-Ball FBGA Package Pin Outs ................................................................... 8
Figure 3. G.703 BITS Clock Mode in NRZ Mode .......................................................................... 23
Figure 4. G.703 BITS Clock Mode in RZ Mode............................................................................. 23
Figure 5. G.703 BITS Clock Mode in Remote Loopback .............................................................. 23
Figure 6. Pulse Mask at E1 Interface ............................................................................................24
Figure 7. Analog Loopback Block Diagram ................................................................................... 30
Figure 8. Analog Loopback with TAOS Block Diagram................................................................. 30
Figure 9. Digital Loopback Block Diagram .................................................................................... 31
Figure 10. Digital Loopback with TAOS ........................................................................................ 31
Figure 11. Remote Loopback Block Diagram ............................................................................... 31
Figure 12. Serial Read/Write Format (SPOL = 0) ......................................................................... 33
Figure 13. Arbitrary Waveform UI ................................................................................................. 42
Figure 14. Test Access Port Architecture...................................................................................... 44
Figure 15. TAP Controller State Diagram ..................................................................................... 45
Figure 16. Internal RX/TX Impedance Matching ........................................................................... 50
Figure 17. Internal TX, External RX Impedance Matching............................................................ 51
Figure 18. Jitter Transfer Characteristic vs. G.736 & TBR 12/13 .................................................. 56
Figure 19. Jitter Tolerance Characteristic vs. G.823..................................................................... 57
Figure 20. Recovered Clock and Data Switching Characteristics................................................. 59
Figure 21. Transmit Clock and Data Switching Characteristics .................................................... 59
Figure 22. Signal Rise and Fall Characteristics ............................................................................ 59
Figure 23. Serial Port Read Timing Diagram ................................................................................ 60
Figure 24. Serial Port Write Timing Diagram ................................................................................ 60
Figure 25. Parallel Port Timing - Write; Intel® Multiplexed Address / Data Bus Mode ................. 62
Figure 26. Parallel Port Timing - Read; Intel Multiplexed Address / Data Bus Mode.................... 62
Figure 27. Parallel Port Timing - Write; Motorola® Multiplexed Address / Data Bus Mode .......... 63
Figure 28. Parallel Port Timing - Read; Motorola Multiplexed Address / Data Bus Mode............. 63
Figure 29. Parallel Port Timing - Write; Intel Non-Multiplexed Address / Data Bus Mode ............ 65
Figure 30. Parallel Port Timing - Read; Intel Non-Multiplexed Address / Data Bus Mode ............ 65
Figure 31. Parallel Port Timing - Write; Motorola Non-Multiplexed Address / Data Bus Mode ..... 66
Figure 32. Parallel Port Timing - Read; Motorola Non-Multiplexed Address / Data Bus Mode ..... 66
Figure 33. JTAG Switching Characteristics................................................................................... 67
Figure 34. 160-Ball FBGA Package Drawing................................................................................ 69
Figure 35. 144-Pin LQFP Package Drawing ................................................................................. 70


Podobny numer części - CS61880

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Cirrus Logic
CS61880-IQ CIRRUS-CS61880-IQ Datasheet
488Kb / 22P
   Octal E1 Line Interface Evaluation Board
More results

Podobny opis - CS61880

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Intel Corporation
LXT381II INTEL-LXT381II Datasheet
226Kb / 36P
   Octal E1 Line Interface Unit
logo
Cirrus Logic
CS61884 CIRRUS-CS61884_05 Datasheet
1Mb / 71P
   Octal T1/E1/J1 Line Interface Unit
logo
Integrated Device Techn...
IDT82V2058 IDT-IDT82V2058 Datasheet
609Kb / 52P
   OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
IDT82V2058-10 IDT-IDT82V2058-10 Datasheet
1Mb / 53P
   OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
logo
Cirrus Logic
CS61884 CIRRUS-CS61884 Datasheet
1Mb / 72P
   Octal T1/E1/J1 Line Interface Unit
logo
Renesas Technology Corp
IDT82V2058 RENESAS-IDT82V2058 Datasheet
889Kb / 54P
   OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
January 21, 2010
logo
List of Unclassifed Man...
CH5008 ETC-CH5008 Datasheet
133Kb / 2P
   Octal E1 Short Haul Line Interface Unit
Rev1.0, March,2005
logo
Integrated Device Techn...
IDT82V2048 IDT-IDT82V2048 Datasheet
673Kb / 61P
   OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
IDT82V2048 IDT-IDT82V2048_10 Datasheet
1Mb / 62P
   OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
logo
Renesas Technology Corp
IDT82V2048 RENESAS-IDT82V2048 Datasheet
723Kb / 63P
   OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
November 14, 2012
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com