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MC14046BCP Arkusz danych(PDF) 5 Page - ON Semiconductor |
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MC14046BCP Arkusz danych(HTML) 5 Page - ON Semiconductor |
5 / 7 page MOTOROLA CMOS LOGIC DATA 5 MC14046B Typical Low–Pass Filters NOTE: Sometimes R3 is split into two series resistors each R3 ÷ 2. A capacitor CC is then placed from the midpoint to ground. The value for CC should be such that the corner frequency of this network does not significantly affect ωn. In Figure B, the ratio of R3 to R4 sets the damping, R4 ^ (0.1)(R3) for optimum results. Figure 3. General Phase–Locked Loop Connections and Waveforms Waveforms Note: for further information, see: (1) F. Gardner, “Phase–Lock Techniques”, John Wiley and Son, New York, 1966. (2) G. S. Moschytz, “Miniature RC Filters Using Phase–Locked Loop”, BSTJ, May, 1965. (3) Garth Nash, “Phase–Lock Loop Design Fundamentals”, AN–535, Motorola Inc. (4) A. B. Przedpelski, “Phase–Locked Loop Design Articles”, AR254, reprinted by Motorola Inc. PCAin @ FREQUENCY f ′ PCBin 14 3 PHASE COMPARATOR EXTERNAL LOW–PASS FILTER VCO 2 OR 13 PC1out OR PC2out VCOin 9 9 10 4 EXTERNAL ÷ N COUNTER R1 R2 11 12 6 7 CIA CIB CI SFout RSF VCOout @ FREQUENCY Nf ′ = f (a) INPUT R3 OUTPUT C2 2fC [ 1 p 2 pfL R3 C2 (a) INPUT R3 OUTPUT R4 C2 Typically: R4 C2 + 6N fmax – N 2 pD f (R3 ) 3, 000W)C2 + 100N Df fmax2 –R4 C2 ∆ f = fmax – fmin Definitions: N = Total division ratio in feedback loop K φ = VDD/π for Phase Comparator 1 K φ = VDD/4 π for Phase Comparator 2 KVCO + 2 pD fVCO VDD –2 V 2 p fr 10 for a typical design ωn ^ (at phase detector input) ζ ^ 0.707 LOW–PASS FILTER Filter A Filter B wn + K fKVCO NR3C2 z + N wn 2KfKVCO F(s) + 1 R3C2S ) 1 wn + K fKVCO NC2(R3 ) R4) z + 0.5 wn (R3C2 ) N KfKVCO ) F(s) + R3C2S ) 1 S(R3C2 ) R4C2) ) 1 PCAin PCBin PC1out VCOin VDD VSS VOH VOL VOH VOL VOH VOL PCAin PCBin PC2out VCOin LD VDD VSS VOH VOL VOH VOL VOH VOL VOL VOH Phase Comparator 1 Phase Comparator 2 SOURCE FOLLOWER |
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