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CS42436 Arkusz danych(PDF) 2 Page - Cirrus Logic

Numer części CS42436
Szczegółowy opis  108 dB, 192 kHz 6-in, 6-out TDM CODEC
Download  66 Pages
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Producent  CIRRUS [Cirrus Logic]
Strona internetowa  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42436 Arkusz danych(HTML) 2 Page - Cirrus Logic

  CS42436 Datasheet HTML 1Page - Cirrus Logic CS42436 Datasheet HTML 2Page - Cirrus Logic CS42436 Datasheet HTML 3Page - Cirrus Logic CS42436 Datasheet HTML 4Page - Cirrus Logic CS42436 Datasheet HTML 5Page - Cirrus Logic CS42436 Datasheet HTML 6Page - Cirrus Logic CS42436 Datasheet HTML 7Page - Cirrus Logic CS42436 Datasheet HTML 8Page - Cirrus Logic CS42436 Datasheet HTML 9Page - Cirrus Logic Next Button
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TABLE OF CONTENTS
1 PIN DESCRIPTION - SOFTWARE MODE
.............................................................................. 6
1.1 Digital I/O Pin Characteristics ............................................................................................7
2 PIN DESCRIPTIONS - HARDWARE MODE
...................................................................... 9
3 TYPICAL CONNECTION DIAGRAMS ................................................................................... 11
4 CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 13
SPECIFIED OPERATING CONDITIONS ............................................................................... 13
ABSOLUTE MAXIMUM RATINGS ......................................................................................... 13
ANALOG INPUT CHARACTERISTICS (CS42436-CMZ)....................................................... 14
ANALOG INPUT CHARACTERISTICS (CS42436-DMZ)....................................................... 15
ADC DIGITAL FILTER CHARACTERISTICS ......................................................................... 16
ANALOG OUTPUT CHARACTERISTICS (CS42436-CMZ)................................................... 17
ANALOG OUTPUT CHARACTERISTICS (CS42436-DMZ)................................................... 19
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ................ 21
SWITCHING SPECIFICATIONS - ADC/DAC PORT .............................................................. 22
SWITCHING CHARACTERISTICS - AUX PORT................................................................... 23
SWITCHING SPECIFICATIONS - CONTROL PORT - I²C MODE......................................... 24
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI FORMAT ................................... 25
DC ELECTRICAL CHARACTERISTICS................................................................................. 26
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ....................................... 26
5 APPLICATIONS ....................................................................................................................... 27
5.1 Overview .......................................................................................................................... 27
5.2 Analog Inputs ................................................................................................................... 28
5.2.1 Line Level Inputs ................................................................................................. 28
5.2.2 ADC3 Analog Input ............................................................................................. 29
5.2.3 High Pass Filter and DC Offset Calibration ......................................................... 30
5.3 Analog Outputs ................................................................................................................ 31
5.3.1 Initialization ......................................................................................................... 31
5.3.2 Line-level Outputs and Filtering .......................................................................... 31
5.3.3 Digital Volume Control ........................................................................................ 33
5.3.4 De-Emphasis Filter .............................................................................................. 33
5.4 System Clocking .............................................................................................................. 34
5.5 CODEC Digital Interface .................................................................................................. 34
5.5.1 TDM .................................................................................................................... 34
5.5.2 I/O Channel Allocation ........................................................................................ 35
5.6 AUX Port Digital Interface Formats .................................................................................. 36
5.6.1 I²S ........................................................................................................................ 36
5.6.2 Left Justified ........................................................................................................ 36
5.7 Control Port Description and Timing ................................................................................ 37
5.7.1 SPI Mode ............................................................................................................ 37
5.7.2 I2C Mode ............................................................................................................. 38
5.8 Recommended Power-up Sequence ............................................................................... 39
5.8.1 Hardware Mode ................................................................................................... 39
5.8.2 Software Mode .................................................................................................... 39
5.9 Reset and Power-up ....................................................................................................... 39
5.10 Power Supply, Grounding, and PCB layout ................................................................... 40
6 REGISTER QUICK REFERENCE ........................................................................................... 41
7 REGISTER DESCRIPTION ..................................................................................................... 43
7.1 Memory Address Pointer (MAP) ....................................................................................... 43
7.2 Chip I.D. and Revision Register (address 01h) (Read Only) ............................................ 43
7.3 Power Control (address 02h) ............................................................................................ 44
7.4 Functional Mode (address 03h) ........................................................................................ 45


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