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CS42438 Arkusz danych(PDF) 2 Page - Cirrus Logic

Numer części CS42438
Szczegółowy opis  108 dB, 192 kHz 6-in, 8-out TDM CODEC
Download  64 Pages
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Producent  CIRRUS [Cirrus Logic]
Strona internetowa  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42438 Arkusz danych(HTML) 2 Page - Cirrus Logic

  CS42438 Datasheet HTML 1Page - Cirrus Logic CS42438 Datasheet HTML 2Page - Cirrus Logic CS42438 Datasheet HTML 3Page - Cirrus Logic CS42438 Datasheet HTML 4Page - Cirrus Logic CS42438 Datasheet HTML 5Page - Cirrus Logic CS42438 Datasheet HTML 6Page - Cirrus Logic CS42438 Datasheet HTML 7Page - Cirrus Logic CS42438 Datasheet HTML 8Page - Cirrus Logic CS42438 Datasheet HTML 9Page - Cirrus Logic Next Button
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TABLE OF CONTENTS
1 PIN DESCRIPTION - SOFTWARE MODE ................................................................................ 6
1.1 Digital I/O Pin Characteristics ............................................................................................7
2 PIN DESCRIPTIONS - HARDWARE MODE ............................................................................ 8
3 TYPICAL CONNECTION DIAGRAMS .................................................................................... 10
4 CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 12
SPECIFIED OPERATING CONDITIONS ............................................................................... 12
ABSOLUTE MAXIMUM RATINGS ......................................................................................... 12
ANALOG INPUT CHARACTERISTICS (CS42438-CMZ)....................................................... 13
ANALOG INPUT CHARACTERISTICS (CS42438-DMZ)....................................................... 14
ADC DIGITAL FILTER CHARACTERISTICS ......................................................................... 15
ANALOG OUTPUT CHARACTERISTICS (CS42438-CMZ)................................................... 16
ANALOG OUTPUT CHARACTERISTICS (CS42438-DMZ)................................................... 18
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ................ 20
SWITCHING SPECIFICATIONS - ADC/DAC PORT .............................................................. 21
SWITCHING CHARACTERISTICS - AUX PORT................................................................... 22
SWITCHING SPECIFICATIONS - CONTROL PORT - I²C MODE......................................... 23
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI FORMAT ................................... 24
DC ELECTRICAL CHARACTERISTICS................................................................................. 25
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ....................................... 25
5 APPLICATIONS ....................................................................................................................... 26
5.1 Overview .......................................................................................................................... 26
5.2 Analog Inputs ................................................................................................................... 27
5.2.1 Line Level Inputs ................................................................................................. 27
5.2.2 ADC3 Analog Input ............................................................................................. 28
5.2.3 High Pass Filter and DC Offset Calibration ......................................................... 29
5.3 Analog Outputs ................................................................................................................ 30
5.3.1 Initialization ......................................................................................................... 30
5.3.2 Line-level Outputs and Filtering .......................................................................... 30
5.3.3 Digital Volume Control ........................................................................................ 32
5.3.4 De-Emphasis Filter .............................................................................................. 32
5.4 System Clocking .............................................................................................................. 33
5.5 CODEC Digital Interface .................................................................................................. 33
5.5.1 TDM .................................................................................................................... 33
5.5.2 I/O Channel Allocation ........................................................................................ 34
5.6 AUX Port Digital Interface Formats .................................................................................. 35
5.6.1 I²S ........................................................................................................................ 35
5.6.2 Left Justified ........................................................................................................ 35
5.7 Control Port Description and Timing ................................................................................ 36
5.7.1 SPI Mode ............................................................................................................ 36
5.7.2 I2C Mode ............................................................................................................. 37
5.8 Recommended Power-up Sequence ............................................................................... 38
5.8.1 Hardware Mode ................................................................................................... 38
5.8.2 Software Mode .................................................................................................... 38
5.9 Reset and Power-up ....................................................................................................... 38
5.10 Power Supply, Grounding, and PCB layout ................................................................... 39
6 REGISTER QUICK REFERENCE ........................................................................................... 40
7 REGISTER DESCRIPTION ..................................................................................................... 42
7.1 Memory Address Pointer (MAP) ....................................................................................... 42
7.2 Chip I.D. and Revision Register (address 01h) (Read Only) ............................................ 42
7.3 Power Control (address 02h) ............................................................................................ 43
7.4 Functional Mode (address 03h) ........................................................................................ 44


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