SN74CBTD3384C

10BIT FET BUS SWITCH WITH LEVEL SHIFTING

5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION

SCDS133A −SEPTEMBER 2003 − REVISED OCTOBER 2003

3

POST OFFICE BOX 655303

simplified schematic, each FET switch (SW)

A

EN†

B

† EN is the internal enable signal applied to the switch.

Undershoot

Protection Circuit

−0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±128 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±100 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

63

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DBQ package

61

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package

86

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package

46

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

88

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. All voltages are with respect to ground unless otherwise specified.

2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3. VI and VO are used to denote specific conditions for VI/O.

4. II and IO are used to denote specific conditions for II/O.

5. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Notes 6 and 7)

MIN

MAX

UNIT

VCC

Supply voltage

4.5

5.5

V

VIH

High-level control input voltage

2

5.5

V

VIL

Low-level control input voltage

0

0.8

V

VI/O

Data input/output voltage

0

5.5

V

TA

Operating free-air temperature

−40

85

°C

NOTES:

6. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application

report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

7. In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no

level-shifting effect.