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MC14557BFEL Arkusz danych(PDF) 2 Page - ON Semiconductor |
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MC14557BFEL Arkusz danych(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC14557B http://onsemi.com 2 PIN ASSIGNMENT 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 L32 L16 L8 L4 VDD A/B SEL Q Q CLOCK RESET L1 L2 VSS A B CE BLOCK DIAGRAM TRUTH TABLE Inputs Output Rst A/B Clock CE Q 00 0 B 01 0 A 00 1 B 01 1 A 1X X X 0 Q is the output of the first selected shift register stage. X = Don’t Care 12 13 14 1 15 2 9 7 6 5 4 3 11 10 RESET CLOCK CE B A A/B SELECT L1 L2 L4 L8 L16 L32 Q Q VDD = PIN 16 VSS = PIN 8 LENGTH SELECT TRUTH TABLE L32 L16 L8 L4 L2 L1 Register Length 0 0 0 0 0 0 0 0 0 0 0 1 1 Bit 2 Bit 0 0 0 0 0 0 0 0 0 1 1 0 2 Bits 3 Bits 0 0 0 0 0 0 0 0 1 1 0 1 3 Bits 4 Bits 0 0 0 0 0 0 0 1 1 0 1 0 4 Bits 5 Bits 0 0 0 0 0 0 1 1 0 0 0 1 5 Bits 6 Bits 0 0 0 1 0 1 6 Bits 1 0 0 0 0 0 33 Bit 1 1 0 0 0 0 0 0 0 0 0 1 33 Bits 34 Bits 1 0 0 0 0 1 34 Bits 1 1 1 1 0 0 61 Bits 1 1 1 1 1 1 62 Bits 1 1 1 1 1 1 1 1 1 0 0 1 63 Bits 64 Bit 1 1 1 1 0 1 64 Bits NOTE: Length equals the sum of the binary length control subscripts plus one. |
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