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ADC081500EVAL Arkusz danych(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części ADC081500EVAL
Szczegółowy opis  High Performance, Low Power, 8-Bit, 1.5 GSPS A/D Converter
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC081500EVAL Arkusz danych(HTML) 1 Page - National Semiconductor (TI)

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ADC081500
High Performance, Low Power, 8-Bit, 1.5 GSPS A/D
Converter
General Description
The ADC081500 is a low power, high performance CMOS
analog-to-digital converter that digitizes signals to 8 bits
resolution at sample rates up to 1.7 GSPS. Consuming a
typical 1.2 W at 1.5 GSPS from a single 1.9 Volt supply, this
device is guaranteed to have no missing codes over the full
operating temperature range. The unique folding and inter-
polating architecture, the fully differential comparator design,
the innovative design of the internal sample-and-hold ampli-
fier and the self-calibration scheme enable a very flat re-
sponse of all dynamic parameters beyond Nyquist, produc-
ing a high 7.3 ENOB with a 748 MHz input signal and a 1.5
GHz sample rate while providing a 10
-18 B.E.R. Output
formatting is offset binary and the LVDS digital outputs are
compliant with IEEE 1596.3-1996, with the exception of an
adjustable common mode voltage between 0.8V and 1.2V.
The converter output has a 1:2 demultiplexer that feeds two
LVDS buses and reduces the output data rate on each bus to
one-half the sample rate.
The converter typically consumes less than 3.5 mW in the
Power Down Mode and is available in a 128-lead, thermally
enhanced exposed pad LQFP and operates over the Indus-
trial (-40˚C
≤ T
A
≤ +85˚C) temperature range.
Features
n
Internal Sample-and-Hold
n
Single +1.9V ±0.1V Operation
n
Choice of SDR or DDR output clocking
n
Multiple ADC Synchronization Capability
n
Guaranteed No Missing Codes
n
Serial Interface for Extended Control
n
Fine Adjustment of Input Full-Scale Range and Offset
n
Duty Cycle Corrected Sample Clock
Key Specifications
n
Resolution
8 Bits
n
Max Conversion Rate
1.5 GSPS (min)
n
Bit Error Rate
10
-18 (typ)
n
ENOB @ 748 MHz Input
7.3 Bits (typ)
n
DNL
±0.15 LSB (typ)
n
Power Consumption
— Operating
1.2 W (typ)
— Power Down Mode
3.5 mW (typ)
Applications
n
Direct RF Down Conversion
n
Digital Oscilloscopes
n
Satellite Set-top boxes
n
Communications Systems
n
Test Instrumentation
Block Diagram
20153153
September 2005
© 2005 National Semiconductor Corporation
DS201531
www.national.com


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