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ISD94100 Arkusz danych(PDF) 61 Page - Nuvoton Technology Corporation |
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ISD94100 Arkusz danych(HTML) 61 Page - Nuvoton Technology Corporation |
61 / 109 page ISD94100 Series Datasheet Sep 09, 2019 Page 61 of 109 Rev1.13 6.9 Watchdog Timer (WDT) 6.9.1 Overview The purpose of Watchdog Timer (WDT) is to perform a system reset when system runs into an unknown state. This prevents system from hanging for an infinite period of time. Besides, this Watchdog Timer supports the function to wake-up system from Idle/Power-down mode. 6.9.2 Features 18-bit free running up counter for WDT time-out interval Selectable time-out interval (24 ~ 218) and the time-out interval is 1.6 ms ~ 26.214 s if WDT_CLK = 10 kHz. System kept in reset state for a period of (1 / WDT_CLK) * 63 Supports selectable WDT reset delay period, including 1026、130、18 or 3 WDT_CLK reset delay period Supports to force WDT enabled after chip power-on or reset by setting CWDTEN[2:0] in CONFIG0 register Supports WDT time-out wake-up function only if WDT clock source is selected as 10 kHz or LXT. |
Podobny numer części - ISD94100 |
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Podobny opis - ISD94100 |
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