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CC3130 Arkusz danych(PDF) 33 Page - Texas Instruments |
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CC3130 Arkusz danych(HTML) 33 Page - Texas Instruments |
33 / 75 page 8.15.5.4 Fast Clock (Fref) Using an External Oscillator The CC3130 device can accept an external TCXO/XO for the 40-MHz clock. In this mode of operation, the clock is connected to WLAN_XTAL_P (pin 23). WLAN_XTAL_N (pin 22) is connected to GND. The external TCXO/XO can be enabled by TCXO_EN (pin 21) from the device to optimize the power consumption of the system. If the TCXO does not have an enable input, an external LDO with an enable function can be used. Using the LDO improves noise on the TCXO power supply. Figure 8-12 shows the connection. CC3130 WLAN_XTAL_P WLAN_XTAL_N XO (40 MHz) 82 pF TCXO_EN EN OUT Vcc C Figure 8-12. External TCXO Input Section 8.15.5.4.1 lists the external Fref clock requirements. 8.15.5.4.1 External Fref Clock Requirements (–40°C to +85°C) CHARACTERISTICS TEST CONDITIONS MIN TYP MAX UNIT Frequency 40.00 MHz Frequency accuracy (Initial plus temperature plus aging) ±20 ppm Frequency input duty cycle 45% 50% 55% Vpp Clock voltage limits Sine or clipped sine wave, AC coupled 0.7 1.2 Vpp Phase noise at 40 MHz at 1 kHz –125 dBc/Hz at 10 kHz –138.5 at 100 kHz –143 Input impedance Resistance 12 kΩ Capacitance 7 pF 8.15.6 Interfaces This section describes the interfaces that are supported by the CC3130 device: • Host SPI • Flash SPI • Digital IO 8.15.6.1 Host SPI Interface Timing Figure 8-13 shows the Host SPI interface timing diagram. www.ti.com CC3130 SWRS227 – MARCH 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 33 |
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