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RM48L940 Arkusz danych(PDF) 95 Page - Texas Instruments |
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RM48L940 Arkusz danych(HTML) 95 Page - Texas Instruments |
95 / 174 page RM48L940, RM48L740, RM48L540 www.ti.com SPNS175C – APRIL 2012 – REVISED JUNE 2015 Table 6-31. Interrupt Request Assignments (continued) DEFAULT VIM MODULES INTERRUPT SOURCES INTERRUPT CHANNEL Ethernet C0_THRESH_PULSE 78 Ethernet C0_RX_PULSE 79 HWAG1 HWA_INT_REQ_H 80 HWAG2 HWA_INT_REQ_H 81 DCC1 DCC1 done interrupt 82 DCC2 DCC2 done interrupt 83 Reserved Reserved 84 PBIST PBIST_DONE 85 Reserved Reserved 86 Reserved Reserved 87 HWAG1 HWA_INT_REQ_L 88 HWAG2 HWA_INT_REQ_L 89 Reserved Reserved 90-95 NOTE Address location 0x00000000 in the VIM RAM is reserved for the phantom interrupt ISR entry; therefore only request channels 0 to 94 can be used and are offset by 1 address in the VIM RAM. NOTE The lower-order interrupt channels are higher priority channels than the higher-order interrupt channels. NOTE The application can change the mapping of interrupt sources to the interrupt channels via the interrupt channel control registers (CHANCTRLx) inside the VIM module. Copyright © 2012–2015, Texas Instruments Incorporated System Information and Electrical Specifications 95 Submit Documentation Feedback |
Podobny numer części - RM48L940_V01 |
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Podobny opis - RM48L940_V01 |
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