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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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RM48L940 Arkusz danych(PDF) 17 Page - Texas Instruments |
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RM48L940 Arkusz danych(HTML) 17 Page - Texas Instruments |
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17 / 174 page  RM48L940, RM48L740, RM48L540 www.ti.com SPNS175C – APRIL 2012 – REVISED JUNE 2015 Table 4-11. PGE Ethernet Controller: Reduced Media Independent Interface (RMII) TERMINAL RESET SIGNAL PULL PULL TYPE DESCRIPTION 144 TYPE SIGNAL NAME STATE PGE RMII carrier sense and data N2HET1[12]/MII_CRS/RMII_CRS_DV 124 valid RMII synchronous reference N2HET1[28]/MII_RX_CLK/RMII_REFCLK/MII_RX_AVCLK4 107 clock for receive, transmit and Fixed 20-µA control interface Input Pulldown Pulldown AD1EVT/MII_RX_ER/RMII_RX_ER 86 RMII receive error N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0]/RMII_RXD[0] 91 RMII receive data N2HET1[26]/MII_RXD[1]/RMII_RXD[1] 92 MIBSPI5SOMI[0]/MII_TXD[0]/RMII_TXD[0] 98 RMII transmit data MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1] 99 Output Pullup None MIBSPI5CLK/MII_TXEN/RMII_TXEN 100 RMII transmit enable Table 4-12. PGE Ethernet Controller: Media Independent Interface (MII) TERMINAL RESET SIGNAL PULL PULL TYPE DESCRIPTION 144 TYPE SIGNAL NAME STATE PGE MIBSPI1NCS[1]/N2HET1[17]/MII_COL 130 Pullup None Collision detect Input Fixed 20-µA Carrier sense and receive N2HET1[12]/MII_CRS/RMII_CRS_DV 124 Pulldown Pulldown valid N2HET1[28]/MII_RX_CLK/RMII_REFCLK/MII_RX_AVCLK4 107 I/O Pulldown None MII output receive clock N2HET1[30]/MII_RX_DV 127 Received data valid Input AD1EVT/MII_RX_ER/RMII_RX_ER 86 Receive error Fixed 20-µA N2HET1[28]/MII_RX_CLK/RMII_REFCLK/MII_RX_AVCLK4 107 I/O Pulldown Receive clock Pulldown N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0]/RMII_RXD[0] 91 N2HET1[26]/MII_RXD[1]/RMII_RXD[1] 92 Input Receive data MIBSPI1NENA/N2HET1[23]/MII_RXD[2] 96 Fixed 20-µA Pullup Pulldown MIBSPI5NENA/MII_RXD[3] 97 N2HET1[10]/MII_TX_CLK/MII_TX_AVCLK4 118 MII output transmit clock I/O Pulldown None N2HET1[10]/MII_TX_CLK/MII_TX_AVCLK4 118 Transmit clock MIBSPI5SOMI[0]/MII_TXD[0]/RMII_TXD[0] 98 MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1] 99 Pullup None Transmit data MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2] 105 Output N2HET1[8]/MIBSPI1SIMO[1]/MII_TXD[3] 106 Pulldown None MIBSPI5CLK/MII_TXEN/RMII_TXEN 100 Pullup None Transmit enable 4.3.1.11 System Module Interface Table 4-13. PGE System Module Interface TERMINAL RESET SIGNAL PULL PULL TYPE DESCRIPTION 144 TYPE SIGNAL NAME STATE PGE Power-on reset, cold reset External power supply monitor circuitry must drive nPORRST Fixed 100-µA low when any of the supplies nPORRST 46 Input Pulldown Pulldown to the microcontroller fall out of the specified range. This terminal has a glitch filter. See Section 6.8. Copyright © 2012–2015, Texas Instruments Incorporated Terminal Configuration and Functions 17 Submit Documentation Feedback |
Podobny numer części - RM48L940_V01 |
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Podobny opis - RM48L940_V01 |
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