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AM79M576A-2 Arkusz danych(PDF) 10 Page - Advanced Micro Devices

Numer części AM79M576A-2
Szczegółowy opis  Metering Subscriber Line Interface Circuit
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Producent  AMD [Advanced Micro Devices]
Strona internetowa  http://www.amd.com
Logo AMD - Advanced Micro Devices

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10
Am79M576A Data Sheet
SWITCHING WAVEFORMS
Notes:
*
When any power supplies to the MSLIC are removed and the MSLIC is not in the Ringing state, the relay driver must not
activate when the relay coil connected to VCCRING is supplied by the same VCC used for powering the MSLIC.
If the relay coil connected to VCCRING is supplied by a voltage other than the VCC used for powering the MSLIC, you must:
– Provide redundancy of VCC from the supply voltage of the relay
– As an alternative, limit the current flowing to all digital inputs to less than 1 mA.
1. Unless otherwise noted, test conditions are BAT = 48 V (voltage at chip VBAT pin = –47.3 V), VCC = +5 V, VEE = –5 V,
RL = 600 Ω, CHP = 0.22 µF, RDC1 = RDC2 = 18.7 kΩ, CDC = 0.15 µF, Rd = 57.6 kΩ, no fuse resistors, two-wire AC output
impedance programming impedance (ZT) = 306 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive.
(See Table 2 for component formulas.) Operation in polarity reverse is tested in production.
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance
matches the impedance programmed by ZT.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90
Ω and metallic impedance of 300 Ω for frequencies < 12 kHz and
135
Ω for frequencies >12 kHz. These tests are extremely sensitive to circuit board layout. Refer to application notes for details.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the anti-sat 2 operating region, this parameter will be degraded. The exact degradation will depend on
system design. The anti-sat 2 region occurs at high loop resistances when |VBAT| – |VAX – VBX| is less than approximately 13 V.
8. “Midpoint” is defined as the connection point between two 300
Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch regulator chopper are not included.
10. Calculate loop current limit, which depends upon the programmed apparent open circuit voltage and the feed resistance, is
as follows:
In OHT state: ILIMIT = 0.202 and
In Active state: ILIMIT = 0.68
DET
tgkde
tshde
tgkde
tshde
DET
tshdd
tshd0
tgkd0
tgkdd
E1
E1 to DET
E0 to DET
E0
E1
Note:
All delays measured at 1.4 V level.
50
• V
APPARENT
R
DC
--------------------------------------------


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