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TC9WMB1FK Arkusz danych(PDF) 5 Page - Toshiba Semiconductor

Numer części TC9WMB1FK
Szczegółowy opis  1024-Bit (128 x 8 Bit) / 2048-Bit (256 x 8 Bit) 2-Wire Serial E2PROM
Download  15 Pages
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Producent  TOSHIBA [Toshiba Semiconductor]
Strona internetowa  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC9WMB1FK Arkusz danych(HTML) 5 Page - Toshiba Semiconductor

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TC9WMB1FK,TC9WMB2FK
2002-07-31
5
5. Write Operation
(1)
Byte write
A byte write writes data to a specified address. After a start condition, input a device address,
W
R/
(= 0), a word address, and write data.
When a stop condition is entered subsequently, write operation starts automatically, rewriting the
data at the specified address with the input data. A next instruction cannot be accepted while write
operation is in progress. Therefore, no acknowledge signal is returned. After writing the data, the chip
automatically enters the standby state.
(2)
Page write
A page write writes up to eight bytes of data collectively to a specified page. After a start condition,
input a device address,
W
R/
(= 0), a word address (n), and write data (n), in the same way as for a
byte write. Then, input write data (n + 1) immediately without entering a stop condition, while
checking that an acknowledge signal is asserted (0).
The upper four bits (A3 to A6) of the word address are fixed and the lower three bits (A0 to A2) are
automatically incremented so that up to eight bytes of data can be input.
When the last address within the page is reached, the lower three bits (A0 to A2) of the word
address are rolled over to the first address of the page. If more than eight bytes of write data are
input, the last eight bytes are valid.
When a stop condition is entered subsequently, write operation starts automatically, rewriting the
data at the specified addresses with the input data.
Figure 5
SDA LINE
1 0 1 0 × × × 0
W
6
W
4
W
5
W
3
W
1
W
2
W
0
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
S
T
A
R
T
M
S
B
DEVICE
ADDRESS
W
R
I
T
E
L
S
B
A
C
K
R
/
W
W
7
*
WORD
ADDRESS
A
C
K
A
C
K
WRITE
DATA
S
T
O
P
Address
increment
*: Don't care for the TC9WMB1
M
S
B
L
S
B
Figure 6
SDA LINE
1 0 1 0 × × × 0
W
6
W
4
W
5
W
3
W
1
W
2
W
0
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
D
4
D
5
D
3
D
1
D
2
D
0
S
T
A
R
T
M
S
B
DEVICE
ADDRESS
W
R
I
T
E
L
S
B
A
C
K
R
/
W
W
7
*
WORD
ADDRESS (n)
A
C
K
A
C
K
WRITE
DATA (n)
WRITE
DATA (n
+ 1)
A
C
K
WRITE
DATA (n
+ m)
S
T
O
P
A
C
K
Address
increment
Address
increment
Address
increment
*: Don't care for the TC9WMB1


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