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AD9887APCB Arkusz danych(PDF) 4 Page - Analog Devices |
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AD9887APCB Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 44 page REV. 0 –4– AD9887A–SPECIFICATIONS Test AD9887AKS-100 AD9887AKS-140 AD9887AKS-170 Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max Unit RESOLUTION 8 8 8 Bits DC ACCURACY Differential Nonlinearity 25 °CI ±0.5 +1.15/–1.0 ±0.5 +1.25/–1.0 ±0.8 +1.25/–1.0 LSB Full VI +1.15/–1.0 +1.25/–1.0 +1.50/–1.0 LSB Integral Nonlinearity 25 °CI ±0.5 ±1.40 ±0.5 ±1.4 ±1.0 ±2.25 LSB Full VI ±1.75 ±2.5 ±2.75 LSB No Missing Codes 25 °CI Guaranteed Guaranteed Guaranteed ANALOG INPUT Input Voltage Range Minimum Full VI 0.5 0.5 0.5 V p-p Maximum Full VI 1.0 1.0 1.0 V p-p Gain Tempco 25 °CV 135 150 150 ppm/ °C Input Bias Current 25 °CIV 111 µA Full IV 1 1 1 µA Input Full-Scale Matching Full VI 8.0 8.0 8.0 % FS Offset Adjustment Range Full VI 43 48 53 43 48 53 43 48 53 % FS REFERENCE OUTPUT Output Voltage Full V 1.3 1.3 1.3 V Temperature Coefficient Full V 90 90 90 ppm/ °C SWITCHING PERFORMANCE 1 Maximum Conversion Rate Full VI 100 140 170 MSPS Minimum Conversion Rate Full IV 10 10 10 MSPS Clock to Data Skew, tSKEW Full IV –1.5 +2.5 –1.5 +2.5 –1.5 +2.5 ns Serial Port Timing tBUFF Full VI 4.7 4.7 4.7 µs tSTAH Full VI 4.0 4.0 4.0 µs tDHO Full VI 0 0 0 µs tDAL Full VI 4.7 4.7 4.7 µs tDAH Full VI 4.0 4.0 4.0 µs tDSU Full VI 250 250 250 ns tSTASU Full VI 4.7 4.7 4.7 µs tSTOSU Full VI 4.0 4.0 4.0 µs HSYNC Input Frequency Full IV 15 110 15 110 15 110 kHz Maximum PLL Clock Rate Full VI 100 140 170 MHz Minimum PLL Clock Rate Full IV 12 12 12 MHz PLL Jitter 25 °CIV 500 700 2 440 650 3 370 500 4 ps p-p Full IV 1000 2 700 3 700 4 ps p-p Sampling Phase Tempco Full IV 10 10 10 ps/ °C DIGITAL INPUTS Input Voltage, High (VIH) Full VI 2.6 2.6 2.6 V Input Voltage, Low (VIL) Full VI 0.8 0.8 0.8 V Input Current, High (VIH) Full IV –1.0 –1.0 –1.0 µA Input Current, Low (VIL) Full IV +1.0 +1.0 +1.0 µA Input Capacitance 25 °CV 333 pF DIGITAL OUTPUTS Output Voltage, High (VOH) Full VI 2.4 2.4 2.4 V Output Voltage, Low (VOL) Full VI 0.4 0.4 0.4 V Duty Cycle DATACK, DATACK Full IV 45 55 60 45 55 60 45 55 65 % Output Coding Binary Binary Binary ANALOG INTERFACE (V D = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate, unless otherwise noted.) |
Podobny numer części - AD9887APCB |
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Podobny opis - AD9887APCB |
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