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LM3205TL Arkusz danych(PDF) 5 Page - National Semiconductor (TI) |
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LM3205TL Arkusz danych(HTML) 5 Page - National Semiconductor (TI) |
5 / 18 page System Characteristics The following spec table entries are guaranteed by design providing the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Min and Max limits apply over the full operating ambient temperature range (−30˚C ≤ T A ≤ 85˚C) and over the V IN range = 2.7V to 5.5V, T A = 25˚C, PVIN =VDD = EN = 3.6V, L = 3.3µH, DCR of L ≤ 100mΩ,C IN = 10µF, 0603, 6.3V (4.7µF||4.7µF, 0603, 6.3V can be used), C OUT = 4.7µF, 0603, 6.3V for LM3205TL/LM3205SD unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units T RESPONSE Time for V OUT to rise from 0.8V to 3.6V V IN = 4.2V, COUT = 4.7µF, L = 3.3µH, R LOAD = 5.5 Ω 20 30 µs Time for V OUT to fall from 3.6V to 0.8V V IN = 4.2V, COUT = 4.7µF, L = 3.3µH, R LOAD =10 Ω 20 30 µs C CON V CON input capacitance V CON = 1V, Test frequency = 100 kHz 20 pF Linearity Linearity in control range 0.32V to 1.44V V IN = 3.9V Monotonic in nature -3 +3 % I CON Control pin input current -10 10 µA T ON Turn on time (time for output to reach 3.6V from Enable low to high transition) EN = Low to High, V IN = 4.2V, VO = 3.6V, C OUT = 4.7µF, IOUT ≤ 1mA 70 100 µs η Efficiency (L = 3.3µH, DCR ≤ 100mΩ) V IN = 3.6V, VOUT = 0.8V, IOUT = 90mA 83 % V IN = 4.2V, VOUT = 3.4V, IOUT = 400mA 96 % V OUT_ripple Ripple voltage, PWM mode V IN = 3V to 4.5V, VOUT = 0.8V, IOUT = 10mA to 400mA (Note 12) 10 mVp-p Line_tr Line transient response V IN = 600mV perturbance, T RISE =TFALL = 10µs, VOUT = 0.8V, IOUT = 100mA 50 mVpk Load_tr Load transient response V IN = 3.1/3.6/4.5V, VOUT = 0.8V, transients up to 100mA, T RISE =TFALL = 10µs 50 mVpk PSRR V IN = 3.6V, VOUT = 0.8V, IOUT = 100mA sine wave perturbation frequency = 10kHz, amplitude = 100mVp-p 40 dB Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pins. The LM3205 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150˚C (typ.) and disengages at TJ = 130˚C (typ.). Note 4: The Human body model is a 100pF capacitor discharged through a 1.5k Ω resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200pF capacitor discharged directly into each pin. Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX). Note 6: microSMD:Junction-to-ambient thermal resistance ( θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. A 4 layer, 4" x 4", 2/1/1/2 oz. Cu board as per JEDEC standards is used for the measurements. LLP: The value of ( θJA) in LLP-10 could fall in a range of 50˚C/W to 150˚C/W (if not wider), depending on PWB material, layout, and environmental conditions. In applications where high maximum power dissipation exits (high VIN , high IOUT ), special care must be paid to thermal dissipation areas. For more information on these topics for LLP, refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Due to the pulsed nature of the testing TA =TJ for the electrical characteristics table. Note 8: The parameters in the electrical characteristics table are tested under open loop conditions at PVIN =VDD = 3.6V. For performance over the input voltage range and closed loop results refer to the datasheet curves. Note 9: Shutdown current includes leakage current of PFET. Note 10: IQ specified here is when the part is operating at 100% duty cycle. Note 11: Current limit is built-in, fixed, and not adjustable. Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. www.national.com 5 |
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