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Revision 2.1
Jan.
2004
4
JEDEC
PARAMETER
NAME
NAME
DESCRIPTION
CYCLE TIME : 70ns
UNIT
t
AVAX
t
RC
Read Cycle Time
70
--
--
55
--
--
ns
t
AVQV
t
AA
Address Access Time
--
--
70
--
--
55
ns
t
E1LQV
t
ACS1
Chip Select Access Time
(CE1)
--
--
70
--
--
55
ns
t
E2LQV
t
ACS2
Chip Select Access Time
(CE2)
--
--
70
--
--
55
ns
t
GLQV
t
OE
Output Enable to Output Valid
--
--
35
--
--
30
ns
t
ELQX
t
CLZ
Chip Select to Output Low Z
10
--
--
10
--
--
ns
t
GLQX
t
OLZ
Output Enable to Output in Low Z
10
--
--
10
--
--
ns
t
EHQZ
t
CHZ
Chip Deselect to Output in High Z
--
--
35
--
--
30
ns
t
GHQZ
t
OHZ
Output Disable to Output in High Z
--
--
30
--
--
25
ns
t
AXOX
t
OH
Data Hold from Address Change
10
--
--
10
--
--
ns
R0201-
STC62WV1M8
AC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )
READ CYCLE
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
,
STC
STC62WV1M8
PARAMETER
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
1V/ns
Input and Output
Timing Reference Level
0.5Vcc
Output Load
CL = 30pF+1TTL
CL = 100pF+1TTL
MIN.
TYP.
MAX.
Vcc=2.7~5.5V
MIN. TYP. MAX.
Vcc=3.0~5.5V
CYCLE TIME : 55ns