Preliminary Technical Data

AD5290

Rev. Pr C | Page 8 of 11

OPERATION

The AD5290 is a 256-position digitally controlled variable

resistor device that can be controlled digitally through SPI

interface.

An internal power-on preset places the wiper at midscale

during power-on, which simplifies the fault condition recovery

at power-up.

DETERMINING THE VARIABLE RESISTANCE

AND VOLTAGE

Rheostat Mode Operation

If only the W-to-B or W-to-A terminals are used as variable

resistors, the unused terminal can be opened or shorted with W.

This operation is called rheostat mode (Figure 3).

A

W

B

A

W

B

A

W

B

Figure 3. Rheostat Mode Configuration

points accessed by the wiper terminal, plus the B terminal

decoded to select one of the 256 settings. Assuming that a 10

kΩ part is used, the wiper’s first connection starts at the B

terminal for data 0x00. Such connection yields a minimum of

60 Ω resistance between terminals W and B because of the 60 Ω

wiper contact resistance. The second connection is the first tap

for data 0x01, and so on. Each LSB data value increase moves

the wiper up the resistor ladder until the last tap point is reached

diagram of the equivalent RDAC circuit. The general equation

W

AB

WB

R

R

256

D

)

D

(

R

+

×

=

(1)

where:

D is the decimal equivalent of the 8-bit binary code.

the internal switch.

the A Terminal Is Opened

D (Dec)

Output State

255

10020

128

5060

Midscale

1

99

1 LSB

0

60

Zero-Scale (Wiper Contact Resistance)

Since a finite wiper resistance of 60 Ω is present in the zero-

scale condition, care should be taken to limit the current flow

between W and B in this state to a maximum pulse current of

no more than 20 mA. Otherwise, degradation or possible

destruction of the internal switch contact can occur.

Similar to the mechanical potentiometer, the resistance of the

RDAC between the wiper W and terminal A also produces a

the B terminal can be opened or shorted to W. Setting the

and decreases as the data loaded in the latch increases in value.

The general equation for this operation is

W

AB

WA

R

R

256

D

256

)

D

(

R

+

×

−

=

(2)

B Terminal Is Opened

D (Dec)

Output State

255

60

Full-Scale

128

5060

Midscale

1

10020

1 LSB

0

10060

Zero-Scale

The typical distribution of the resistance tolerance from device

to device is process lot dependent, and it is possible to have

±30% tolerance.

Figure 6. AD5290 Equivalent RDAC Circuit

Potentiometer Mode Operation

If all three terminals are used, the operation is called the

potentiometer mode. The most common configuration is the

voltage divider operation (Figure 7).

B

RDAC

LATCH

AND

DECODER

W

A

D7

D6

D4

D5

D2

D3

D1

D0