Tr i p ath Technol ogy, I n c. - Techni cal I n for m ati on

10

TA0103 – Rev 3.3/06.00

The MOSFET drivers in the TA0103A are operated from voltages obtained from VN12 and LO1COM

side. Only N-Channel MOSFETs are required for both the top and bottom of the half bridge. VN12

and thereby minimize voltage overshoots.

Over- and Under-Voltage Protection

conditions. The over- and under-voltage limits are Vo and Vu respectively as specified in the

Electrical Characteristics table. If the supply voltage exceeds Vo or drops below Vu, the TA0103A

shuts off the output stages of the amplifiers and asserts a logic level high on HMUTE. The removal

of the over-voltage or under-voltage condition returns the TA0103A to normal operation and returns

HMUTE to a logic level low. Please note that the limits specified in the Electrical Characteristics

table are at 25

°C and these limits may change over temperature.

Over-current Protection

The TA0103A has over-current protection circuitry to protect itself and the output transistors from

short-circuit conditions.

OCS1H+, OCS1H-, OCS1L+ and OCS1L-), that is in series with each output MOSFET to detect an

be Kelvin connected for proper operation. See “Circuit Board Layout” in Application Information for

details. An over-current condition will cause the TA0103A to shut off the output stages of the

amplifiers and supply a logic level high on HMUTE. The occurrence of an over-current condition is

latched in the TA0103A and can be cleared by toggling the MUTE input or cycling power.

Overload

When logic low, the OVERLOADB pin indicates that the level of the input signal has overloaded the

amplifier and that the audio output signal is starting to distort. The OVERLOADB signal is active

only while an overload is present. The OVERLOADB signal can be used to control a distortion

indicator light or LED through a simple buffer circuit.

Mute

When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and

low-side transistors are turned off) and a logic level high is output on the HMUTE pin. When a logic

level low is supplied to MUTE, both amplifiers are fully operational and a logic level low is supplied

on HMUTE. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE

and the un-muting of the TA0103A.