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STAC9460 Arkusz danych(PDF) 3 Page - List of Unclassifed Manufacturers

Numer części STAC9460
Szczegółowy opis  Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
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STAC9460 Arkusz danych(HTML) 3 Page - List of Unclassifed Manufacturers

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2-9460-D1-1-0-0801
3
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
PRELIMINARY
INFORMATION
8/2 4 /0 1
1.1.
List of Figures
Figure 1. STAC9460 Block Diagram ................................................................................................................5
Figure 2. Typical Connection Diagram .............................................................................................................8
Figure 3. Serial interface to microcontroller or microprocessor ........................................................................9
Figure 4. I2S Format .......................................................................................................................................10
Figure 5. I2S Left Justified Format .................................................................................................................10
Figure 6. I2S Right Justified Format ...............................................................................................................10
Figure 7. Single Line Data Mode Timing Diagram .........................................................................................11
Figure 8. I2C Timing Diagram .........................................................................................................................11
Figure 9. STAC9460 Pin Designation ...........................................................................................................19
Figure 10. STAC9462 Pin Designation ..........................................................................................................19
Figure 11. Package Outline ............................................................................................................................22
1.2.
List of Tables
Table 1. Digital Audio Interface Configuration ................................................................................................10
Table 2. Single Line Data Mode, Data Valid on Rising Edge of SCLK ...........................................................11
Table 3. I2C Mode Specifications ...................................................................................................................12
Table 4. Programming Registers ....................................................................................................................13
Table 5. Reset/Status Register ......................................................................................................................14
Table 6. Master Volume Register ...................................................................................................................14
Table 7. DAC Digital Volume Registers .........................................................................................................15
Table 8. Left and Right Mic Input Volume Registers ......................................................................................15
Table 9. On/Off De-emphasis Selection for Each Channel ............................................................................15
Table 10. De-emphasis Filter Selection .........................................................................................................15
Table 11. MSB Microphone/Differential Input Selection .................................................................................16
Table 12. Bit D6 ADC High Pass Filter Disable ..............................................................................................16
Table 13. Bit D5 Microphone DifferentialMux By-Pass Control ......................................................................16
Table 14. Audio Data Format Selection .........................................................................................................16
Table 15. Sample Rate Mode ........................................................................................................................17
Table 16. MCLK Mode ...................................................................................................................................17
Table 17. Powerdown Control ........................................................................................................................18
Table 18. Digital Signal List ............................................................................................................................20
Table 19. Analog Signal List ..........................................................................................................................20
Table 20. Filtering and Voltage References ...................................................................................................20
Table 21. Power Signal List ...........................................................................................................................21


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