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ST7LNB0 Arkusz danych(PDF) 10 Page - STMicroelectronics

Numer części ST7LNB0
Szczegółowy opis  Diseqc TM 2.1 Slave Microsontroller for LNBs and Switchers
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LNB0 Arkusz danych(HTML) 10 Page - STMicroelectronics

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ST7LNB0
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6.3 OPERATING CONDITIONS
6.3.1 General Operating Conditions:
6.3.2 Operating Conditions with Low Voltage Detector (LVD)
Notes:
1. Not tested in production. The VDD rise time rate condition is needed to ensure a correct device power-on and LVD reset.
When the VDD slope is outside these values, the LVD may not ensure a proper reset of the MCU.
6.3.3 Operating Conditions with the DiSEqC™ Signalling
Notes:
1. In backwards compatible mode, bus DC voltage is compared with 15 V, if it exceeds this voltage then it is considered
as 13 V else it is considered as 18 V.
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
Supply voltage
4.5
5.5
V
TA
Ambient temperature
-40
+85
°C
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
4.00
4.25
4.50
V
VIT-(LVD)
Reset generation threshold
(VDD fall)
3.80
4.10
4.30
Vhys
LVD voltage threshold hysteresis
VIT+(LVD)-VIT-(LVD)
200
mV
VtPOR
VDD rise time rate
1)
20
20000
µs/V
tg(VDD)
Filtered glitch delay on VDD
Not detected by the LVD
150
ns
IDD(LVD)
LVD/AVD current consumption
200
µA
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fDiSEqC
DiSEqC™ tone frequency
17.6
22
26.4
KHz
VDiSEqC
DiSEqC™ tone voltage
150
650
mVpp
VBackward
13/18 volt backward compatibility
voltage threshold 1)
15
V


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