Zakładka z wyszukiwarką danych komponentów |
|
ST7LNB0 Arkusz danych(PDF) 3 Page - STMicroelectronics |
|
ST7LNB0 Arkusz danych(HTML) 3 Page - STMicroelectronics |
3 / 22 page ST7LNB0 3/22 2 ST7LNB0 IMPLEMENTATION The following figure shows a typical application circuit for the ST7LNB0: Figure 3 ST7LNB0 typical application circuit Notes: 1.The divider chain connected to the DRX pin must have the following resistance values: 330K Ω and 100K Ω. 2.The reset circuitry linked to the RESET pin is optional, in fact the ST7LNB0 has an internal voltage level detector LVD which generates a static reset when the VDD supply is below a threshold voltage of 4.1 V. 3.The DiSEqC signalling must have a tone frequency of 22KHz(+/- 20%) and an amplitude exceeding 150 mV peak to peak. 4. When the LVD is enabled (default state), it is mandatory not to connect a pull-up resistor. A 10nF pull- down capacitor is recommended to filter noise on the reset line. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ST7LNB0 CONTROL F-CONNECTOR 4.7K (4) 10n 100K 330K LNB / SWITCHER CONTROL SBY LNB / SWITCHER (Uncommitted SW) (Committed SW) 2.2 nF 2N2222 OPTIONAL 1 |
Podobny numer części - ST7LNB0 |
|
Podobny opis - ST7LNB0 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |