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GS840Z18AT-150I Arkusz danych(PDF) 4 Page - GSI Technology |
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GS840Z18AT-150I Arkusz danych(HTML) 4 Page - GSI Technology |
4 / 24 page GS840Z18/36AT-180/166/150/100 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.03 11/2004 4/24 © 2001, GSI Technology 100-Pin TQFP Pin Descriptions Symbol Type Description A0, A1 In Burst Address Inputs; preload the burst counter A In Address Inputs CK In Clock Input Signal BA In Byte Write signal for data inputs DQA1-DQA9; active low BB In Byte Write signal for data inputs DQB1-DQB9; active low BC In Byte Write signal for data inputs DQC1-DQC9; active low BD In Byte Write signal for data inputs DQD1-DQD9; active low W In Write Enable; active low E1 In Chip Enable; active low E2 In Chip Enable; active high; for self decoded depth expansion E3 In Chip Enable; active low, for self decoded depth expansion G In Output Enable; active low ADV In Advance / Load—Burst address counter control pin CKE In Clock Input Buffer Enable; active low DQA I/O Byte A Data Input and Output pins DQB I/O Byte B Data Input and Output pins DQC I/O Byte C Data Input and Output pins DQD I/O Byte D Data Input and Output pins ZZ In Power down control; active high FT In Pipeline/Flow Through Mode Control; active low LBO In Linear Burst Order; active low VDD In 3.3 V power supply VSS In Ground VDDQ In 3.3 V output power supply for noise reduction NC — No Connect |
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