Zakładka z wyszukiwarką danych komponentów |
|
GS81032AQ-138I Arkusz danych(PDF) 8 Page - GSI Technology |
|
GS81032AQ-138I Arkusz danych(HTML) 8 Page - GSI Technology |
8 / 23 page Rev: 1.01 7/2001 8/23 © 2000, Giga Semiconductor, Inc. Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS81032AT/Q-150/138/133/117/100/66 First Write First Read Burst Write Burst Read Deselect R W CR CW X X W R R W R X X X CR R CW CR CR W CW W CW Simplified State Diagram with G Notes: 1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G. 2. Use of “Dummy Reads” (read cycles with G high) may be used to make the transition from read cycles to write cycles without passing through a Deselect cycle. Dummy read cycles increment the address counter just like normal read cycles. 3. Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off, and for incoming data to meet Data Input Set Up Time. |
Podobny numer części - GS81032AQ-138I |
|
Podobny opis - GS81032AQ-138I |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |