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ADSP-2185MKST-300 Arkusz danych(PDF) 7 Page - Analog Devices |
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ADSP-2185MKST-300 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 40 page REV. 0 ADSP-2185M –7– Memory Interface Pins The ADSP-2185M processor can be used in one of two modes: Full Memory Mode, which allows BDMA operation with full exter- nal overlay memory and I/O capability, or Host Mode, which allows IDMA operation with limited external addressing capabilities. The operating mode is determined by the state of the Mode C pin during RESET and cannot be changed while the processor is running. The following tables list the active signals at specific pins of the DSP during either of the two operating modes (Full Memory or Host). A signal in one table shares a pin with a signal from the other table, with the active signal determined by the mode set. For the shared pins and their alternate signals (e.g., A4/IAD3), refer to the package pinout tables. Full Memory Mode Pins (Mode C = 0) Pin Name # of Pins I/O Function A13:0 14 O Address Output Pins for Program, Data, Byte, and I/O Spaces D23:0 24 I/O Data I/O Pins for Program, Data, Byte, and I/O Spaces (8 MSBs are also used as Byte Memory Addresses.) Host Mode Pins (Mode C = 1) Pin Name # of Pins I/O Function IAD15:0 16 I/O IDMA Port Address/Data Bus A0 1 O Address Pin for External I/O, Program, Data, or Byte Access 1 D23:8 16 I/O Data I/O Pins for Program, Data, Byte, and I/O Spaces IWR 1 I IDMA Write Enable IRD 1 I IDMA Read Enable IAL 1 I IDMA Address Latch Pin IS 1 I IDMA Select IACK 1 O IDMA Port Acknowledge Configurable in Mode D; Open Drain NOTE 1In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals. |
Podobny numer części - ADSP-2185MKST-300 |
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Podobny opis - ADSP-2185MKST-300 |
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