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74HCT182 Arkusz danych(PDF) 2 Page - NXP Semiconductors |
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74HCT182 Arkusz danych(HTML) 2 Page - NXP Semiconductors |
2 / 9 page December 1990 2 Philips Semiconductors Product specification Look-ahead carry generator 74HC/HCT182 FEATURES • Provides carry look-ahead across a group of four ALU’s • Multi-level look-ahead for high-speed arithmetic operation over long word length • Output capability: standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT182 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT182 carry look-ahead generators accept up to four pairs of active LOW carry propagate (P0, P1, P2, P3) and carry generate (G0, G1, G2, G3) signals and an active HIGH carry input (Cn). The devices provide anticipated active HIGH carries (Cn+x, Cn+y, Cn+z) across four groups of binary adders. The “182” also has active LOW carry propagate (P) and carry generate (G) outputs which may be used for further levels of look-ahead. The logic equations provided at the outputs are: Cn+x =G0 +P0Cn Cn+y =G1 +P1G0 +P1P0Cn Cn+z =G2 +P2G1 +P2P1G0 +P2P1P0Cn The “182” can also be used with binary ALU’s in an active LOW or active HIGH input operand mode. The connections to and from the ALU to the carry look-ahead generator are identical in both cases. GG 3 P 3 G2 P 3 P2 G1 P 3 P2 P1 GO ++ + = PP 3 P2 P1 P0 = QUICK REFERENCE DATA GND = 0 V; Tamb =25 °C; tr =tf = 6 ns Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL/ tPLH propagation delay Pn to P Cn to any output Pn or Gn to any output CL = 15 pF; VCC =5 V 11 17 14 14 21 17 ns ns ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per package notes 1 and 2 50 50 pF |
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