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74HCT192D Arkusz danych(PDF) 6 Page - NXP Semiconductors |
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74HCT192D Arkusz danych(HTML) 6 Page - NXP Semiconductors |
6 / 13 page December 1990 6 Philips Semiconductors Product specification Presettable synchronous BCD decade up/down counter 74HC/HCT192 Fig.5 Typical clear, load and count sequence. (1) Clear overrides load, data and count inputs. (2) When counting up the count down clock input (CPD) must be HIGH, when counting down the count up clock input (CPU) must be HIGH. Sequence Clear (reset outputs to zero); load (preset) to BCD seven; count up to eight, nine, terminal count up, zero, one and two; count down to one, zero, terminal count down, nine, eight, and seven. Fig.6 Logic diagram. |
Podobny numer części - 74HCT192D |
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Podobny opis - 74HCT192D |
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