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ADT7470ARQ-REEL Arkusz danych(PDF) 4 Page - Analog Devices |
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ADT7470ARQ-REEL Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 40 page ADT7470 Preliminary Technical Data Rev. PrA | Page 4 of 40 Note the following about the specifications for the ADT7470: • All voltages are measured with respect to GND, unless otherwise specified. • Typical values are at TA = 25°C and represent most likely parametric norm. • Logic inputs accept input high voltages up to 5 V even when device is operating at supply voltages below 5 V. • VDD should never be floated in presence of SCL/SDA activity. Charge injection can be sufficient to induce approximately 0.6 V on VDD. • Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.0 V for a rising edge. SCL SDA PS tBUF tHD;STA tHD;DAT tHIGH tSU;DAT tHD;STA tSU;STA tSU;STO tLOW tR tF SP Figure 2. Diagram for Serial Bus Timing |
Podobny numer części - ADT7470ARQ-REEL |
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Podobny opis - ADT7470ARQ-REEL |
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