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ADT7302ARM-REEL Arkusz danych(PDF) 9 Page - Analog Devices |
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ADT7302ARM-REEL Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 14 page Preliminary Technical Data ADT7302 Rev. PrE | Page 9 of 14 SCLK DOUT DIN POWER- DOWN LEADING ZEROS DB13 12 3 4 15 16 t4 t3 t2 t1 t5 t6 t8 t7 DB12 DB1 DB0 CS Figure 13. Serial Interface Timing Diagram SERIAL INTERFACE The serial interface on the ADT7302 consists of four wires: CS, SCLK, DIN, and DOUT. The interface can be operated in 2- wire mode with CS and DIN tied to ground, in which case the inter-face has read-only capability, with data being read from the data register via the DOUT line. It is advisable to utilize CS, which improves synchronization between the ADT7302 and the master device. The DIN line is used to write the part into standby mode, if required. The CS line is used to select the device when more than one device is connected to the serial clock and data lines. The part operates in a slave mode and requires an externally applied serial clock to the SCLK input to access data from the data register. The serial interface on the ADT7302 allows the part to be interfaced to systems that provide a serial clock synchronized to the serial data, such as the 80C51, 87C51, 68HC11, 68HC05 and PIC16Cxx microcontrollers as well as DSP processors. A read operation from the ADT7302 accesses data from the temperature value register while a write operation to the part writes data to the control register. Read Operation Figure 13 shows the timing diagram for a serial read from the ADT7302. The CS line enables the SCLK input. Thirteen bits of data plus a sign bit are transferred during a read operation. Read operations occur during streams of 16 clock pulses. The first two bits out are leading zeros and the next 14 bits contain the temperature data. If CS remains low and 16 more SCLK cycles are applied, the ADT7302 loops around and outputs the two leading zeros plus the 14 bits of data that are in the temper- ature value register. When CS returns high, the DOUT line goes into three-state. Data is clocked out onto the DOUT line on the falling edge of SCLK. Write Operation Figure 13 also shows the timing diagram for a serial write to the ADT7302. The write operation takes place at the same time as the read operation. Only the third bit in the data stream provides a user-controlled function. This third bit is the power- down bit, which, when set to a 1, puts the ADT7302 into shutdown mode. Besides the power-down bit, all bits in the input data stream should be zero to ensure correct operation of the ADT7302. Data is loaded into the control register on the 16 th rising SCLK edge; the data takes effect at this time, i.e., if the part is programmed to go into shutdown, it does so at this point. If CS is brought high before this 16 th SCLK edge, the control register is not loaded and the power-down status of the part does not change. Data is clocked into the ADT7302 on the rising edge of SCLK. |
Podobny numer części - ADT7302ARM-REEL |
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Podobny opis - ADT7302ARM-REEL |
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