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74LVT1403DR Arkusz danych(PDF) 2 Page - NXP Semiconductors

Numer części 74LVT1403DR
Szczegółowy opis  3.3V combined 8-bit bus receiver and 4-bit bus driver
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVT1403DR Arkusz danych(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVT1403
3.3V combined 8-bit bus receiver
and 4-bit bus driver
2
1998 Nov 12
853-2134 20359
FEATURES
4-bit 74LVT125-like bus driver
8-bit 74LVT14-like Schmitt trigger
Bus drive +64mA/–32mA
7 bus inputs with common inversion control pin
32-pin TSSOP footprint
DE pin with resistive pull up and active LOW for easier live
insertion
DE pin includes Schmitt trigger with typical 0.6V hysteresis
DESCRIPTION
The 74LVT1403 is a high-performance BiCMOS product designed
for VCC operation at 3.3V.
This device combines the functionality of a 4-bit data path bus driver
and 8-bit Schmitt trigger bus receiver, along with control logic in one
32-pin package.
The receiver inputs are Schmitt trigger type capable of transforming
slowly changing input signals into sharply defined, jitter-free output
signals. The receiver outputs are 74LVT14 style with +32mA/–20mA
drive capability. The receiver inputs include the bus hold feature.
The driver outputs feature power-up in 3-State/live insertion
capability and are all controlled by the A/B, EN1, and EN2 control
pins. The driver inputs include the bus hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
Propagation delay An to Yn
CL = 50pF; VCC = 3.3V
4.5
ns
tPHL
Propagation delay An to Yn
CL = 50pF; VCC = 3.3V
4.0
ns
CIN
Input capacitance
VI = 0V or 3.0V
3
pF
ICC
Total supply current
Outputs low, VCC = 3.6V
4
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
32-pin plastic TSSOP
–40
°C to +85°C
74LVT1403 DR
74LVT1403 DR
SOT487-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
INV
RY0
RY1
RY2
RY3
RY4
RY5
RY7
EN1
EN2
DA0
DA1
DA2
DA3
RY6
GND
DE
DY3
DY2
DY1
DY0
GND
A/B
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0
VCC
THIN
SHRINK
SMALL
OUTLINE
PACKAGE
(TSSOP)
SV00907
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
31, 30, 29, 28, 27, 26,
25, 24
RA0–RA7
Receive Data inputs
2, 3, 4, 5, 6, 7, 8, 9
RY0–RY7
Receive Data outputs
12, 13, 14, 15
DA0–DA3
Driver Data inputs
21, 20, 19, 18
DY0–DY3
Driver Data outputs
10, 11
EN1, EN2
Driver Output enables
23
A/B
Mode control for en-
ables
1
INV
Inversion control
16, 22
GND
Ground (0V)
32
VCC
Positive supply voltage
17
DE
Driver output enable ac-
tive LOW with resistive
pull up


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