MOTOROLA CMOS LOGIC DATA

1

MC14532B

8-Bit Priority Encoder

The MC14532B is constructed with complementary MOS (CMOS)

enhancement mode devices. The primary function of a priority encoder is to

provide a binary address for the active input with the highest priority. Eight

data inputs (D0 thru D7) and an enable input (Ein) are provided. Five outputs

are available, three are address outputs (Q0 thru Q2), one group select (GS)

and one enable output (Eout).

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–power TTL Loads or One Low–Power

Schottky TTL Load over the Rated Temperature Range

Symbol

Parameter

Value

Unit

VDD

DC Supply Voltage

– 0.5 to + 18.0

V

Vin, Vout Input or Output Voltage (DC or Transient)

– 0.5 to VDD + 0.5

V

Iin, Iout

Input or Output Current (DC or Transient),

per Pin

± 10

mA

PD

Power Dissipation, per Package†

500

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature (8–Second Soldering)

260

_C

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/

_C From 65_C To 125_C

Ceramic “L” Packages: – 12 mW/

_C From 100_C To 125_C

TRUTH TABLE

Input

Output

Ein

D7

D6

D5

D4

D3

D2

D1

D0

GS

Q2

Q1

Q0

Eout

0

X

X

X

X

X

X

X

X

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

X

X

X

X

X

X

X

1

1

1

1

0

1

0

1

X

X

X

X

X

X

1

1

1

0

0

1

0

0

1

X

X

X

X

X

1

1

0

1

0

1

0

0

0

1

X

X

X

X

1

1

0

0

0

1

0

0

0

0

1

X

X

X

1

0

1

1

0

1

0

0

0

0

0

1

X

X

1

0

1

0

0

1

0

0

0

0

0

0

1

X

1

0

0

1

0

1

0

0

0

0

0

0

0

1

1

0

0

0

0

X = Don’t Care

This device contains protection circuitry to guard against damage

due to high static voltages or electric fields. However, precautions must

be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, Vin and

Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage

level (e.g., either VSS or VDD). Unused outputs must be left open.

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

REV 3

1/94

L SUFFIX

CERAMIC

CASE 620

ORDERING INFORMATION

MC14XXXBCP

Plastic

MC14XXXBCL

Ceramic

MC14XXXBD

SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

CASE 751B

PIN ASSIGNMENT

MC14532B

13

14

15

16

9

10

11

12

5

4

3

2

1

8

7

6

D2

D3

GS

Eout

VDD

Q0

D0

D1

D7

D6

D5

D4

VSS

Q1

Q2

Ein