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74LVC2G74DP Arkusz danych(PDF) 5 Page - NXP Semiconductors |
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74LVC2G74DP Arkusz danych(HTML) 5 Page - NXP Semiconductors |
5 / 20 page 74LVC2G74_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 3 November 2005 5 of 20 Philips Semiconductors 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH CP transition; Qn+1 = state after the next LOW-to-HIGH CP transition. 9. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 10. Recommended operating conditions Table 6: Function table for synchronous operation [1] Input Output SD RD CP D Qn+1 Qn+1 HH ↑ LLH HH ↑ HHL Table 7: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +6.5 V IIK input clamping current VI <0V - −50 mA VI input voltage [1] −0.5 +6.5 V IOK output clamping current VO >VCC or VO <0V - ±50 mA VO output voltage active mode [1] [2] −0.5 VCC + 0.5 V Power-down mode [1] [2] −0.5 +6.5 V IO output current VO =0 VtoVCC - ±50 mA ICC quiescent supply current - ±100 mA IGND ground current - ±100 mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C - 250 mW Table 8: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage active mode 0 - VCC V Power-down mode; VCC =0V 0 - 5.5 V Tamb ambient temperature −40 - +125 °C ∆t/∆V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 5.5 V 0 - 10 ns/V |
Podobny numer części - 74LVC2G74DP |
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Podobny opis - 74LVC2G74DP |
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