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ADS8481IBPFBR Arkusz danych(PDF) 9 Page - Burr-Brown (TI) |
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ADS8481IBPFBR Arkusz danych(HTML) 9 Page - Burr-Brown (TI) |
9 / 31 page www.ti.com ADS8481 SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006 PIN ASSIGNMENTS (continued) TERMINAL FUNCTIONS NAME NO RGZ I/O DESCRIPTION 8, 9, 17, 20, AGND 23, 24, 26, – Analog ground 27 BDGND 37 – Digital ground for bus interface digital supply BUSY 48 O Status output. High when a conversion is in progress. Bus size select input. Used for selecting 18-bit or 16-bit wide bus transfer. 0: Data bits output on the 18-bit data bus pins DB[17:0]. BUS18/16 2 I 1: Last two data bits D[1:0] from 18-bit wide bus output on: a) the low byte pins DB[9:2] if BYTE = 0 b) the high byte pins DB[17:10] if BYTE = 1 Byte select input. Used for 8-bit bus reading. BYTE 3 I 0: No fold back 1: Low byte D[9:2] of the 16 most significant bits is folded back to high byte of the 16 most significant pins DB[17:10]. CONVST 4 I Convert start. The falling edge of this input ends the acquisition period and starts the hold period. CS 6 I Chip select. The falling edge of this input starts the acquisition period. 8-BIT BUS 16-BIT BUS 18-BIT BUS Data Bus BYTE = 0 BYTE = 1 BYTE = 1 BYTE = 0 BYTE = 0 BYTE = 0 BUS18/16 = 0 BUS18/16 = 0 BUS18/16 = 1 BUS18/16 = 0 BUS18/16 = 1 BUS18/16 = 0 DB17 28 O D17 (MSB) D9 All ones D17 (MSB) All ones D17 (MSB) DB16 29 O D16 D8 All ones D16 All ones D16 DB15 30 O D15 D7 All ones D15 All ones D15 DB14 31 O D14 D6 All ones D14 All ones D14 DB13 32 O D13 D5 All ones D13 All ones D13 DB12 33 O D12 D4 All ones D12 All ones D12 DB11 34 O D11 D3 D1 D11 All ones D11 DB10 35 O D10 D2 D0 (LSB) D10 All ones D10 DB9 38 O D9 All ones All ones D9 All ones D9 DB8 39 O D8 All ones All ones D8 All ones D8 DB7 40 O D7 All ones All ones D7 All ones D7 DB6 41 O D6 All ones All ones D6 All ones D6 DB5 42 O D5 All ones All ones D5 All ones D5 DB4 43 O D4 All ones All ones D4 All ones D4 DB3 44 O D3 All ones All ones D3 D1 D3 DB2 45 O D2 All ones All ones D2 D0 (LSB) D2 DB1 46 O D1 All ones All ones D1 All ones D1 DB0 47 O D0 (LSB) All ones All ones D0 (LSB) All ones D0 (LSB) –IN 19 I Inverting input channel +IN 18 I Noninverting input channel NC 15 No connection REFIN 13 I Reference input REFOUT 14 O Reference output. Add 1- µF capacitor between the REFOUT pin and REFM pin when internal reference is used. REFM 11, 12 I Reference ground Synchronization pulse for the parallel output. When CS is low, this serves as output enable and puts the previous RD 5 I conversion results on the bus. 7, 10, 16, +VA – Analog power supplies, 5-V DC 21, 22, 25 +VBD 1, 36 – Digital power supply for bus 9 Submit Documentation Feedback |
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