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ADG793GBCPZ-500RL7 Arkusz danych(PDF) 10 Page - Analog Devices |
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ADG793GBCPZ-500RL7 Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 24 page ADG793A/ADG793G Rev. 0 | Page 10 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD MUST BE TIED TO GND. 1 S1A 2 S1B 3 D1 4 NC 5 S1C 6 NC 15 D3 16 NC 17 S3C 18 A2 14 S3B 13 S3A ADG793A TOP VIEW (Not to Scale) PIN 1 INDICATOR NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD MUST BE TIED TO GND. 1 S1A 2 S1B 3 D1 4 NC 5 S1C 6 GPO2 15 D3 16 NC 17 S3C 18 A2 14 S3B 13 S3A ADG793G TOP VIEW (Not to Scale) Figure 3. ADG793A Pin Configuration Figure 4. ADG793G Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 S1A A-Side Source Terminal for Mux 1. Can be an input or output. 2 S1B B-Side Source Terminal for Mux 1. Can be an input or output. 3 D1 Drain Terminal for Mux 1. Can be an input or output. 4 NC Not internally connected. 5 S1C C-Side Source Terminal for Mux 1. Can be an input or output. 6 NC/GPO2 Not internally connected for ADG793A. General-Purpose Logic Output 2 for ADG793G. 7 S2A A-Side Source Terminal for Mux 2. Can be an input or output. 8 S2B B-Side Source Terminal for Mux 2. Can be an input or output. 9 D2 Drain Terminal for Mux 2. Can be an input or output. 10 NC Not internally connected. 11 S2C C-Side Source Terminal for Mux 2. Can be an input or output. 12 NC/GPO1 Not internally connected for ADG793A. General-Purpose Logic Output 1 for ADG793G. 13 S3A A-Side Source Terminal for Mux 3. Can be an input or output 14 S3B B-Side Source Terminal for Mux 3. Can be an input or output. 15 D3 Drain Terminal for Mux 3. Can be an input or output. 16 NC Not internally connected. 17 S3C C-Side Source Terminal for Mux 3. Can be an input or output. 18 A2 Logic Input. Sets Bit A2 from the third least significant bit of the 7-bit slave address. 19 A1 Logic Input. Sets Bit A1 from the second least significant bit of the 7-bit slave address. 20 A0 Logic Input. Sets Bit A0 from the first least significant bit of the 7-bit slave address. 21 SCL Digital Input, Serial Clock Line. Open-drain input that is used in conjunction with SDA to clock data into the device. External pull-up resistor required. 22 SDA Digital I/O. Bidirectional open-drain data line. External pull-up resistor required. 23 VDD Positive Power Supply Input. 24 GND Ground (0 V) Reference. |
Podobny numer części - ADG793GBCPZ-500RL7 |
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Podobny opis - ADG793GBCPZ-500RL7 |
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