Zakładka z wyszukiwarką danych komponentów
  Polish  ▼

Delete All
ON OFF
ALLDATASHEET.PL

X  

Preview PDF Download HTML

AD1939 Arkusz danych(PDF) 6 Page - Analog Devices

Numer części AD1939
Szczegółowy opis  4 ADC/8 DAC with PLL, 192 kHz, 24-Bit CODEC
Download  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD1939 Arkusz danych(HTML) 6 Page - Analog Devices

Back Button AD1939 Datasheet HTML 2Page - Analog Devices AD1939 Datasheet HTML 3Page - Analog Devices AD1939 Datasheet HTML 4Page - Analog Devices AD1939 Datasheet HTML 5Page - Analog Devices AD1939 Datasheet HTML 6Page - Analog Devices AD1939 Datasheet HTML 7Page - Analog Devices AD1939 Datasheet HTML 8Page - Analog Devices AD1939 Datasheet HTML 9Page - Analog Devices AD1939 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 32 page
background image
AD1939
Rev. 0 | Page 6 of 32
DIGITAL FILTERS
Table 6.
Parameter
Mode
Factor
Min
Typ
Max
Unit
ADC DECIMATION FILTER
All modes, typ @ 48 kHz
Pass Band
0.4375 fS
21
kHz
Pass-Band Ripple
±0.015
dB
Transition Band
0.5 fS
24
kHz
Stop Band
0.5625 fS
27
kHz
Stop-Band Attenuation
79
dB
Group Delay
22.9844/fS
479
μs
DAC INTERPOLATION FILTER
Pass Band
48 kHz mode, typ @ 48 kHz
0.4535 fS
22
kHz
96 kHz mode, typ @ 96 kHz
0.3646 fS
35
kHz
192 kHz mode, typ @ 192 kHz
0.3646 fS
70
kHz
Pass-Band Ripple
48 kHz mode, typ @ 48 kHz
±0.01
dB
96 kHz mode, typ @ 96 kHz
±0.05
dB
192 kHz mode, typ @ 192 kHz
±0.1
dB
Transition Band
48 kHz mode, typ @ 48 kHz
0.5 fS
24
kHz
96 kHz mode, typ @ 96 kHz
0.5 fS
48
kHz
192 kHz mode, typ @ 192 kHz
0.5 fS
96
kHz
Stop Band
48 kHz mode, typ @ 48 kHz
0.5465 fS
26
kHz
96 kHz mode, typ @ 96 kHz
0.6354 fS
61
kHz
192 kHz mode, typ @ 192 kHz
0.6354 fS
122
kHz
Stop-Band Attenuation
48 kHz mode, typ @ 48 kHz
70
dB
96 kHz mode, typ @ 96 kHz
70
dB
192 kHz mode, typ @ 192 kHz
70
dB
Group Delay
48 kHz mode, typ @ 48 kHz
25/fS
521
μs
96 kHz mode, typ @ 96 kHz
11/fS
115
μs
192 kHz mode, typ @ 192 kHz
8/fS
42
μs
TIMING SPECIFICATIONS
−40°C < TA < +130°C, DVDD = 3.3 V ± 10%.
Table 7.
Parameter
Condition
Comments
Min
Max
Unit
INPUT MASTER CLOCK (MCLK)
AND RESET
tMH
MCLK duty cycle
DAC/ADC clock source = PLL clock @ 256 fS, 384 fS,
512 fS, 768 fS
40
60
%
tMH
DAC/ADC clock source = direct MCLK @ 512 fS (bypass
on-chip PLL)
40
60
%
fMCLK
MCLK frequency
PLL mode, 256 fS reference
6.9
13.8
MHz
fMCLK
Direct 512 fS mode
27.6
MHz
tPDR
Low
15
ns
tPDRR
Recovery
Reset to active output
4096
tMCLK
PLL
Lock time
MCLK and LRCLK
input
10
ms
256 fS VCO Clock
40
60
%
Output Duty Cycle
MCLKO/XO pin


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32 


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn