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AD6654BBC Arkusz danych(PDF) 1 Page - Analog Devices |
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AD6654BBC Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 88 page 14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver AD6654 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2005 Analog Devices, Inc. All rights reserved. FEATURES SNR = 90 dB in 1.25 MHz bandwidth to Nyquist SNR = 87 dB in 1.25 MHz bandwidth to 200 MHz Integrated 14-bit, 92.16 MSPS ADC IF sampling frequencies to 200 MHz Internal 2.4 V reference, 2.2 V p-p analog input range Internal differential track-and-hold analog input Processes 4/6 wideband carriers simultaneously Fractional clock multiplier to 200 MHz Programmable decimating FIR filters, interpolating half-band filters and programmable AGC loops with 96 dB range Three 16-bit configurable parallel output ports User-configurable built-in self-test (BIST) capability 8-/16-bit microport and SPORT/SPI® serial port control APPLICATIONS Multicarrier, multimode digital receivers GSM, EDGE, PHS, UMTS, WCDMA, CDMA2000, TD-SCDMA, WiMAX Micro and pico cell systems, software radios Wireless local loop Smart antenna systems In-building wireless telephony Broadband data applications Instrumentation and test equipment FUNCTIONAL BLOCK DIAGRAM MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 MRCF DRCF M = 1–16 CRCF M = 1–16 LHB L = 1, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 NCO CIC5 M = 1–32 FIR1 HB1 M = BYP, 2 FIR2 HB2 M = BYP, 2 AGC PA PB PC INPUT MATRIX AVDD, DRVDD, VDDCORE, VDDIO, GND SYNC 0, 1, 2, 3 8-BIT/16-BIT MICROPORT INTERFACE SPORT/ SPI INTERFACE PEAK/ RMS MSMT EXP BITS PRN GEN SHA AIN+ AIN– INTERNAL TIMING ENC+ ENC– ADC VREF 2.4V VREF OVR (ADC OVERRANGE) EXP (VGA LEVEL CONTROL) M = DECIMATION L = INTERPOLATION (AVAILABLE IN 6-CHANNEL MODEL ONLY) 4-CHANNEL AND 6-CHANNEL DIGITAL DOWN CONVERTER CLOCK MULTIPLIER 14-BIT ADC FRONT END 14 3 Figure 1. |
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