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ADM3490EARZ-REEL7 Arkusz danych(PDF) 3 Page - Analog Devices |
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ADM3490EARZ-REEL7 Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 20 page ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E Rev. A | Page 3 of 20 GENERAL DESCRIPTION (continued from Page 1) The driver outputs of the ADM3483E/ADM3486E/ ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shut- down circuit. The parts are fully specified over the industrial temperature range and are available in 8-lead and 14-lead narrow SOIC packages. Table 1. Selection Table Part No. Guaranteed Data Rate (Mbps) Supply Voltage (V) Half/Full Duplex Slew Rate Limited Driver/Receiver Enable ±15 kV ESD Protection on Bus Pins Pin Count ADM3483E 0.25 3.0 to 3.6 Half Yes Yes Yes 8 ADM3486E 2.5 3.0 to 3.6 Half Yes Yes Yes 8 ADM3488E 0.25 3.0 to 3.6 Full Yes No Yes 8 ADM3490E 12 3.0 to 3.6 Full No No Yes 8 ADM3491E 12 3.0 to 3.6 Full No Yes Yes 14 |
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