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ADM483JR-REEL7 Arkusz danych(PDF) 6 Page - Analog Devices |
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ADM483JR-REEL7 Arkusz danych(HTML) 6 Page - Analog Devices |
6 / 16 page ADM483 Rev. 0 | Page 6 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RO 1 RE 2 DE 3 DI 4 VCC 8 B 7 A 6 GND 5 ADM483 TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 RO Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low. 2 RE Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance state. 3 DE Driver Output Enable. A high level enables the driver differential inputs A and B. A low level places it in a high impedance state. 4 DI Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces A high and B low. 5 GND Ground. 6 A Noninverting Receiver Input A/Driver Output A. 7 B Inverting Receiver Input B/Driver Output B. 8 VCC 5 V Power Supply. |
Podobny numer części - ADM483JR-REEL7 |
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Podobny opis - ADM483JR-REEL7 |
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