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Zakładka z wyszukiwarką danych komponentów |
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ADUC7026 Arkusz danych(PDF) 8 Page - Analog Devices |
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ADUC7026 Arkusz danych(HTML) 8 Page - Analog Devices |
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8 / 92 page  ADuC7019/20/21/22/24/25/26/27 Rev. A | Page 8 of 92 Parameter Min Typ Max Unit Test Conditions/Comments INTERNAL OSCILLATOR 32.768 kHz ±3 % MCU CLOCK RATE From 32 kHz Internal Oscillator 326 kHz CD = 7 From 32 kHz External Crystal 41.78 MHz CD = 0 Using an External Clock 0.05 44 MHz TA = 85°C 0.05 41.78 MHz TA = 125°C START-UP TIME Core clock = 41.78 MHz At Power-On 130 ms From Pause/Nap Mode 24 ns CD = 0 3.06 μs CD = 7 From Sleep Mode 1.58 ms From Stop Mode 1.7 ms PROGRAMMABLE LOGIC ARRAY (PLA) Pin Propagation Delay 12 ns From input pin to output pin Element Propagation Delay 2.5 ns POWER REQUIREMENTS 13, 14 Power Supply Voltage Range AVDD − AGND and IOVDD − IOGND 2.7 3.6 V Analog Power Supply Currents AVDD Current 200 μA ADC in idle mode; all parts except ADuC7019 400 μA ADC in idle mode; ADuC7019 only DACVDD Current15 3 25 μA Digital Power Supply Current IOVDD Current in Normal Mode Code executing from Flash/EE 7 10 mA CD = 7 11 15 mA CD = 3 40 45 mA CD = 0 (41.78 MHz clock) IOVDD Current in Pause Mode 25 30 mA CD = 0 (41.78 MHz clock) IOVDD Current in Sleep Mode 250 400 μA TA = 85°C 600 1000 μA TA = 125°C Additional Power Supply Currents ADC 2 mA @ 1 MSPS 0.7 mA @ 62.5 kSPS DAC 700 μA per DAC 1 All ADC channel specifications are guaranteed during normal MicroConverter core operation. 2 Apply to all ADC input channels. 3 Measured using the factory set default values in ADCOF and ADCGN. 4 Not production tested but supported by design and/or characterization data on production release. 5 Measured using the factory set default values in ADCOF and ADCGN using an external AD845 op amp as an input buffer stage as shown in Figure 47. Based on external ADC system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the Calibration section). 6 The input signal can be centered on any dc common-mode voltage (VCM) as long as this value is within the ADC voltage input range specified. 7 When using an external reference input pin, the internal reference must be disabled by setting the LSB in the REFCON memory mapped register to 0. 8 DAC linearity is calculated using a reduced code range of 100 to 3995. 9 DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V VREF. 10 Endurance is qualified as per JEDEC Standard 22 method A117 and measured at −40°C, +25°C, +85°C, and +125°C. 11 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22 method A117. Retention lifetime derates with junction temperature. 12 Test carried out with a maximum of eight I/O set to a low output level. 13 Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: Normal Mode: 3.6 V supply, Pause Mode: 3.6 V supply, Sleep Mode: 3.6 V supply. 14 IOVDD power supply current decreases typically by 2 mA during a flash/EE erase cycle. 15 On the ADuC7019/20/21/22, this current must be added to AVDD current. |
Podobny numer części - ADUC7026 |
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Podobny opis - ADUC7026 |
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