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DAC122S085 Arkusz danych(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Numer części DAC122S085
Szczegółowy opis  12-Bit Micro Power DUAL Digital-to-Analog Converter with Rail-to-Rail Output
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

DAC122S085 Arkusz danych(HTML) 7 Page - National Semiconductor (TI)

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Specification Definitions
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB,
which is V
REF /4096=VA / 4096.
DAC-to-DAC CROSSTALK is the glitch impulse transferred
to a DAC output in response to a full-scale change in the
output of another DAC.
DIGITAL CROSSTALK is the glitch impulse transferred to a
DAC output at mid-scale in response to a full-scale change
in the input register of another DAC.
DIGITAL FEEDTHROUGH is a measure of the energy in-
jected into the analog output of the DAC from the digital
inputs when the DAC outputs are not updated. It is mea-
sured with a full-scale code change on the data bus.
FULL-SCALE ERROR is the difference between the actual
output voltage with a full scale code (FFFh) loaded into the
DAC and the value of V
A x 4095 / 4096.
GAIN ERROR is the deviation from the ideal slope of the
transfer function. It can be calculated from Zero and Full-
Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE
is Full-Scale Error and ZE is Zero Error.
GLITCH IMPULSE is the energy injected into the analog
output when the input code to the DAC register changes. It is
specified as the area of the glitch in nanovolt-seconds.
INTEGRAL NON-LINEARITY (INL) is a measure of the
deviation of each individual code from a straight line through
the input to output transfer function. The deviation of any
given code from this straight line is measured from the
center of that code value. The end point method is used. INL
for this product is specified over a limited range, per the
Electrical Tables.
LEAST SIGNIFICANT BIT (LSB) is the bit that has the
smallest value or weight of all bits in a word. This value is
LSB=V
REF /2
n
where V
REF is the supply voltage for this product, and "n" is
the DAC resolution in bits, which is 12 for the DAC122S085.
MAXIMUM LOAD CAPACITANCE is the maximum capaci-
tance that can be driven by the DAC with output stability
maintained.
MONOTONICITY is the condition of being monotonic, where
the DAC has an output that never decreases when the input
code increases.
MOST SIGNIFICANT BIT (MSB) is the bit that has the
largest value or weight of all bits in a word. Its value is 1/2 of
V
A.
MULTIPLYING BANDWIDTH is the frequency at which the
output amplitude falls 3dB below the input sine wave on
V
REFIN with a full-scale code loaded into the DAC.
POWER EFFICIENCY is the ratio of the output current to the
total supply current. The output current comes from the
power supply. The difference between the supply and output
currents is the power consumed by the device without a
load.
SETTLING TIME is the time for the output to settle to within
1/2 LSB of the final value after the input code is updated.
TOTAL HARMONIC DISTORTION (THD) is the measure of
the harmonics present at the output of the DACs with an
ideal sine wave applied to V
REFIN. THD is measured in dB.
WAKE-UP TIME is the time for the output to exit power-
down mode. This is the time from the falling edge of the 16th
SCLK pulse to when the output voltage deviates from the
power-down voltage of 0V.
ZERO CODE ERROR is the output error, or voltage, present
at the DAC output after a code of 000h has been entered.
www.national.com
7


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