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74AUP2G00GT Arkusz danych(PDF) 8 Page - NXP Semiconductors |
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74AUP2G00GT Arkusz danych(HTML) 8 Page - NXP Semiconductors |
8 / 16 page 74AUP2G00_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 8 of 16 Philips Semiconductors 74AUP2G00 Low-power dual 2-input NAND gate 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter Conditions 25 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) CL = 5 pF tpd propagation delay nA, nB to nY; see Figure 7 [2] VCC = 0.8 V - 17.5 - - - - ns VCC = 1.1 V to 1.3 V 2.5 5.3 11.0 2.1 12.2 13.5 ns VCC = 1.4 V to 1.6 V 2.0 3.8 6.8 1.8 7.8 8.6 ns VCC = 1.65 V to 1.95 V 1.6 3.1 5.3 1.4 6.2 6.9 ns VCC = 2.3 V to 2.7 V 1.3 2.5 4.0 1.1 4.7 5.2 ns VCC = 3.0 V to 3.6 V 1.0 2.2 3.6 1.0 4.2 4.7 ns CL = 10 pF tpd propagation delay nA, nB to nY; see Figure 7 [2] VCC = 0.8 V - 21.0 - - - - ns VCC = 1.1 V to 1.3 V 2.4 6.1 13.0 2.2 14.4 15.9 ns VCC = 1.4 V to 1.6 V 2.4 4.4 7.9 2.2 9.2 10.2 ns VCC = 1.65 V to 1.95 V 2.0 3.7 6.2 1.9 7.3 8.1 ns VCC = 2.3 V to 2.7 V 1.4 3.0 4.7 1.3 5.6 6.2 ns VCC = 3.0 V to 3.6 V 1.3 2.8 4.3 1.2 4.9 5.4 ns CL = 15 pF tpd propagation delay nA, nB to nY; see Figure 7 [2] VCC = 0.8 V - 24.5 - - - - ns VCC = 1.1 V to 1.3 V 3.4 6.9 14.8 3.1 16.5 18.2 ns VCC = 1.4 V to 1.6 V 2.8 5.0 8.9 2.5 10.5 11.6 ns VCC = 1.65 V to 1.95 V 2.0 4.1 7.0 2.0 8.3 9.2 ns VCC = 2.3 V to 2.7 V 1.7 3.5 5.3 1.5 6.4 7.1 ns VCC = 3.0 V to 3.6 V 1.6 3.2 4.9 1.4 5.7 6.3 ns CL = 30 pF tpd propagation delay nA, nB to nY; see Figure 7 [2] VCC = 0.8 V - 34.8 - - - - ns VCC = 1.1 V to 1.3 V 4.6 9.2 20.1 4.1 22.6 24.9 ns VCC = 1.4 V to 1.6 V 3.0 6.5 11.8 2.9 14.0 15.4 ns VCC = 1.65 V to 1.95 V 2.6 5.4 9.3 2.3 11.1 12.3 ns VCC = 2.3 V to 2.7 V 2.4 4.6 7.1 2.1 8.5 9.4 ns VCC = 3.0 V to 3.6 V 2.3 4.3 6.5 2.1 7.6 8.4 ns |
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Podobny opis - 74AUP2G00GT |
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