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74AUP1G3208 Arkusz danych(PDF) 4 Page - NXP Semiconductors |
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74AUP1G3208 Arkusz danych(HTML) 4 Page - NXP Semiconductors |
4 / 19 page 74AUP1G3208_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01.00 — 17 January 2006 4 of 19 Philips Semiconductors 74AUP1G3208 Low-power 3-input OR-AND gate 7.2 Pin description 8. Functional description 8.1 Function table [1] H = HIGH voltage level; L = LOW voltage level. 8.2 Logic configurations Table 4: Pin description Symbol Pin Description A 1 data input A GND 2 ground (0 V) B 3 data input B Y 4 data output Y VCC 5 supply voltage C 6 data input C Table 5: Function table [1] Input Output C B A Y LLLL LLH L LH LL L HHL H LLL HL HH HHL H HHHH Table 6: Function selection table Logic function Figure 2-input AND see Figure 5 and 6 2-input OR see Figure 7 3-input gate with the Boolean function: Y=(A+B) × C see Figure 8 |
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