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MC10H101FNR2G Arkusz danych(PDF) 2 Page - ON Semiconductor

Numer części MC10H101FNR2G
Szczegółowy opis  Quad OR/NOR Gate
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MC10H101
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2
Figure 1. Logic Diagram
Figure 2. Pin Assignment
VCC1
Aout
Bout
Ain
Aout
Bout
Bin
VEE
VCC2
Dout
Cout
Din
Common
Input
Cout
Cin
Dout
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
12
9
13
10
7
4
15
11
14
6
3
5
2
Pin assignment is for Dual−in−Line Package.
Table 1. MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
VEE
Power Supply (VCC = 0)
−8.0 to 0
Vdc
VI
Input Voltage (VCC = 0)
0 to VEE
Vdc
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
0 to +75
°C
Tstg
Storage Temperature Range
Plastic
Ceramic
−55 to +150
−55 to +165
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 1)
25°
75°
Symbol
Characteristic
Min
Max
Min
Max
Min
Max
Unit
IE
Power Supply Current
29
26
29
mA
IinH
Input Current High
(Pin 12 only)
425
850
265
535
265
535
mA
IinL
Input Current Low
0.5
0.5
0.3
mA
VOH
High Output Voltage
−1.02
−0.84
−0.98
−0.81
−0.92
−0.735
Vdc
VOL
Low Output Voltage
−1.95
−1.63
−1.95
−1.63
−1.95
−1.60
Vdc
VIH
High Input Voltage
−1.17
−0.84
−1.13
−0.81
−1.07
−0.735
Vdc
VIL
Low Input Voltage
−1.95
−1.48
−1.95
−1.48
−1.95
−1.45
Vdc
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to −2.0 V.


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