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MV1820FDPAS Arkusz danych(PDF) 6 Page - Zarlink Semiconductor Inc |
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MV1820FDPAS Arkusz danych(HTML) 6 Page - Zarlink Semiconductor Inc |
6 / 9 page The MV1820 is a high speed CMOS receiver for Programme Delivery Control (PDC) messages broadcast in World System Teletext (WST) Format Two Broadcast Service Data Packets (BSDP). The PDC message can be read on an I 2C bus with data format similar to standard Video Programming Service (VPS) decoders. Additional data is appended to include new PDC features. It is intended for use in Video Cassette Recorders to provide automatic recording of suitably labelled Television programmes requested by the user. FEATURES I On chip data slicing I Low external component count I I2C bus for low cost interfacing I Advanced CMOS technology gives low power dissipation and high reliability ABSOLUTE MAXIMUM RATINGS Supply voltage 0.3V to 7V All inputs -0.3 to VDD +0.3V Operating temperature 0 to +70 °C Storage temperature -55 to 125 °C ORDERING INFORMATION MV1820F/CG/DPAS MV1820F/CG/MPES PIN 1 2 3 4 5 6 7 8 PIN 16 15 14 13 12 11 10 9 DESCRIPTION XTI XTO DAV SDA VDD SCL SYNC I/O DATA I/O DESCRIPTION RESET EXT/INT BLC WLC VIDEO GND TCR AS 7 10 6 11 5 12 4 13 3 14 2 15 1 16 8 76 54321 8 9 10 11 12 13 14 15 16 9 DP16 MP16 Fig.1 Pin connections - top view Fig.2 MV1820 block diagram Supersedes version in October 1995 Media IC Handbook, HB3120 - 3.0 DS3106 - 3.0 May 1996 MV1820 Video Programme Delivery Control Interface Circuit |
Podobny numer części - MV1820FDPAS |
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Podobny opis - MV1820FDPAS |
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