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CAT25040VIT3 Arkusz danych(PDF) 3 Page - Catalyst Semiconductor |
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CAT25040VIT3 Arkusz danych(HTML) 3 Page - Catalyst Semiconductor |
3 / 18 page 3 CAT25010, CAT25020, CAT25040 Doc. No. 1006, Rev. S © 2006 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice VCC = 1.8V-5.5V VCC = 2.5V-5.5V SYMBOL PARAMETER Min. Max. Min. Max. UNITS tSU Data Setup Time 30 20 ns tH Data Hold Time 30 20 ns tWH SCK High Time 75 40 ns tWL SCK Low Time 75 40 ns fSCK Clock Frequency DC 5 DC 10 MHz tLZ HOLD to Output Low Z 50 25 ns tRI(2) Input Rise Time 2 2 µs tFI(2) Input Fall Time 2 2 µs tHD HOLD Setup Time 0 0 ns tCD HOLD Hold Time 10 10 ns tWC(4) Write Cycle Time 5 5 ms tV Output Valid from Clock Low 75 40 ns tHO Output Hold Time 0 0 ns tDIS Output Disable Time 50 20 ns tHZ HOLD to Output High Z 100 25 ns tCS CS High Time 50 15 ns tCSS CS Setup Time 50 15 ns tCSH CS Hold Time 50 15 ns tWPS WP Setup Time 10 10 ns tWPH WP Hold Time 10 10 ns A.C. CHARACTERISTICS TA = -40 °C to +85°C, unless otherwise specified.(1) Power-Up Timing(2)(3) Symbol Parameter Max. Units tPUR Power-up to Read Operation 1 ms tPUW Power-up to Write Operation 1 ms NOTE: (1) AC Test Conditions: Input Pulse Voltages: 0.3VCC to 0.7VCC Input rise and fall times: ≤10ns Input and output reference voltages: 0.5VCC Output load: current source IOL max/IOH max; CL=50pF (2) This parameter is tested initially and after a design or process change that affects the parameter. (3) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. (4) tWC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle. |
Podobny numer części - CAT25040VIT3 |
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Podobny opis - CAT25040VIT3 |
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