MC100LVEL05

http://onsemi.com

2

1

2

3

45

6

7

8

Q

Q

Figure 1. Logic Diagram and Pinout Assignment

D0, D0; D1, D1

ECL Data Inputs

Q, Q

ECL Data Outputs

Positive Supply

Negative Supply

Table 1. PIN DESCRIPTION

PIN

FUNCTION

EP

Exposed pad must be con-

nected to a sufficient thermal

conduit. Electrically connect

to the most negative supply or

leave floating open.

Table 2. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

PECL Mode Power Supply

8 to 0

V

NECL Mode Power Supply

−8 to 0

V

PECL Mode Input Voltage

NECL Mode Input Voltage

6 to 0

−6 to 0

V

V

Output Current

Continuous

Surge

50

100

mA

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 SOIC

8 SOIC

190

130

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

8 SOIC

41 to 44 ± 5%

°C/W

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 TSSOP

8 TSSOP

185

140

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

8 TSSOP

41 to 44 ± 5%

°C/W

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

DFN8

DFN8

129

84

°C/W

°C/W

Wave Solder

Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.