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MC100LVEL32DR2G Arkusz danych(PDF) 2 Page - ON Semiconductor |
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MC100LVEL32DR2G Arkusz danych(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC100LVEL32 http://onsemi.com 2 4 3 Figure 1. Logic Diagram and Pinout Assessment 1 2 5 6 7 8 Q VEE VCC Q CLK VBB R ÷2 Reset CLK Table 1. PIN DESCRIPTION Pin Function CLK*, CLK** Q, Q Reset* VBB VCC VEE EP ECL Differential Clock Inputs ECL Differential Data ÷2 Outputs ECL Asynch Reset Reference Voltage Output Positive Supply Negative Supply Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. *Pin will default low when left open, per internal 75 K pull−down to VEE. ** Pin will default to VCC/2 when left open per internal 75 KW pull- down to VEE and 75 KW pull−up to VCC. Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V VEE NECL Mode Power Supply VCC = 0 V −8 to 0 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V VI v VCC VI w VEE 6 to 0 −6 to 0 V V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V VI v VCC VI w VEE 6 to 0 −6 to 0 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 ± 5% °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 ± 5% °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W °C/W Tsol Wave Solder Pb Pb−Free <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. |
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