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CAT25C16APA-12T Arkusz danych(PDF) 6 Page - Catalyst Semiconductor |
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CAT25C16APA-12T Arkusz danych(HTML) 6 Page - Catalyst Semiconductor |
6 / 10 page CAT28C16A 6 Doc. No. 1076, Rev. D ADDRESS CE OE WE tRC DATA OUT DATA VALID DATA VALID tCE tOE tOH tAA tOHZ tHZ VIH HIGH-Z tLZ tOLZ low. The data bus is set to a high impedance state when either CE or OE goes high. This 2-line control architec- ture can be used to eliminate bus contention in a system environment. DEVICE OPERATION Read Data stored in the CAT28C16A is transferred to the data bus when WE is held high, and both OE and CE are held Figure 3. Read Cycle Figure 4. Byte Write Cycle [WE Controlled] ADDRESS CE OE WE DATA OUT tAS DATA IN DATA VALID HIGH-Z tCS tAH tCH tWC tOEH tDL tDH tDS tOES tWP |
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