© Semiconductor Components Industries, LLC, 2002

January, 2002 – Rev. 7

1

Publication Order Number:

MC10103/D

MC10103

Quad 2-Input OR Gate

The MC10103 is a quad 2–input OR gate. The MC10103 provides

one gate with OR/NOR outputs.

LOGIC DIAGRAM

14

13

12

11

10

3

7

6

2

5

4

15

9

DIP

PIN ASSIGNMENT

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

http://onsemi.com

Device

Package

Shipping

ORDERING INFORMATION

MC10103L

CDIP–16

25 Units / Rail

MC10103P

PDIP–16

25 Units / Rail

MC10103FN

PLCC–20

46 Units / Rail

MARKING

DIAGRAMS

1

16

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

CDIP–16

L SUFFIX

CASE 620

MC10103L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

PLCC–20

FN SUFFIX

CASE 775

10103

AWLYYWW

1

1

16

MC10103P

AWLYYWW